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3.4
Successive Approximation Mode
The EADC and DAC together can be put into Successive Approximation Mode. The SA module takes
control of the DAC and the EADC. It starts at a low gain, and attempts to measure the input voltage on the
EADC precisely over the full range. It does this in a manner similar to a successive approximation ADC.
Note that multiple samples are taken. If the input signal is changing rapidly, the SA module may not
converge.
3.4.1 SAR Control Parameters
Firmware has the capability to program the following parameters used in the SAR Control algorithm:
•
Final SAR Resolution - Controls the final AFE Gain setting used at the completion of the SAR process
•
SAR Window 1 Range - If error falls in the range of +/- SAR Window 1 Range, the AFE Gain is
incremented to 0x1 as long as Final SAR Resolution does not equal 0x0.
•
SAR Window 2 Range – If error falls in the range of +/- SAR Window 2 Range, the AFE Gain is
incremented to 0x2 as long as Final SAR Resolution does not equal 0x1
•
SAR Range – If error falls in the range of +/- SAR Range, the AFE Gain is incremented to 0x3 as long
as the Final SAR Resolution does not equal 0x2
•
SAR Mode – SAR algorithm configured in Non-Continuous Mode or Continuous Mode
3.4.2 SAR Algorithm Overview
Upon initiation of the SAR process, the SAR Control Module sets the AFE gain to the Starting SAR
Resolution as programmed by firmware. Initially, the MSB of the 10-bit DAC value is set to '1' or the DAC
setpoint is placed at the midpoint of its range. An EADC sample is captured and compared. Based on the
polarity and magnitude of the EADC error, the AFE gain and DAC setpoint are adjusted.
3.4.3 Non-Continuous SAR Mode
UCD3138 features two modes when it attempts to use a SAR algorithm to determine an absolute voltage.
The first mode is Non-Continuous SAR mode. In this mode, the SAR Control Module restarts the SAR
algorithm on each sample trigger from the DPWM module. Upon receipt of a sample trigger from the
DPWM modules, a new EADC sample is requested at an AFE gain of 0x0 and the DAC setpoint is reset
to midpoint.
The Non-Continuous SAR Mode minimizes power consumption by only running the Analog Front End
when a new measurement is needed. The SAR Control Module reruns the entire SAR algorithm on every
sample trigger, which may add latency to the acquisition of the absolute voltage value compared to
continuous mode.
3.4.4 Continuous SAR Mode
Continuous SAR Mode configures the SAR Control Module to continually acquire new EADC samples
from the Analog Front. Upon receipt of a new sample trigger from the DPWM modules, if the error is within
the final SAR window, a new absolute voltage can be generated quickly since the algorithm does not need
to reset the DAC setpoint to midpoint and lower the AFE Gain to 0x0.
The result of the SAR calculation can be read from the EADC value register. To check for EADC overflow,
read the EADC_SAT_HIGH and EADC_SAT_LOW bits in the same register:
if((FeCtrl0Regs.EADCVALUE.bit.EADC_SAT_HIGH
&& FeCtrl0Regs.EADCVALUE.bit.EADC_SAT_LOW) == 0)
{
eadc_absolute = FeCtrl0Regs.EADCVALUE.bit.ABS_VALUE;
}
else
{
//adjust EADCDAC and try again
}
SNIU028A – February 2016 – Revised April 2016
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Copyright © 2016, Texas Instruments Incorporated
Successive Approximation Mode
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