Cycle Adjustment Status Register (Cycadjstat); Cycle Adjustment Status Register (Cycadjstat) Register Field Descriptions - Texas Instruments UCD3138 Technical Reference Manual

Loop Mux Registers Reference

5.14.20 Cycle Adjustment Status Register (CYCADJSTAT)

Address 0002004C
28
CYC_ADJ_CALC
R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5-21. Cycle Adjustment Status Register (CYCADJSTAT) Register Field Descriptions
Bit Field
28-16 CYC_ADJ_CALC
15-10 Reserved
9-0 CYC_ADJ
_ERROR
216
Loop Mux
Figure 5-21. Cycle Adjustment Status Register (CYCADJSTAT)
16 15
Type Reset
R 0
13-bit signed value representing calculated Cycle Adjustment provided to DPWM
module based on first 2 error samples
R 00 0000
R 0
10-bit signed value representing calculated error of the first 2 error samples received
Copyright © 2016, Texas Instruments Incorporated
10
Reserved
R-00 0000
Description
SNIU028A – February 2016 – Revised April 2016
www.ti.com
9
CYC_ADJ_ERROR
R-0
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