Dpwm Event 2 Register (Dpwmev2); Dpwm Event 2 Register (Dpwmev2) Register Field Descriptions - Texas Instruments UCD3138 Technical Reference Manual

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2.31.6 DPWM Event 2 Register (DPWMEV2)

Address 00050014 – DPWM 3 Event 2 Register
Address 00070014 – DPWM 2 Event 2 Register
Address 000A0014 – DPWM 1 Event 2 Register
Address 000D0014 – DPWM 0 Event 2 Register
17
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 2-11. DPWM Event 2 Register (DPWMEV2) Register Field Descriptions
Bit Field
17-0 EVENT2
SNIU028A – February 2016 – Revised April 2016
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Figure 2-22. DPWM Event 2 Register (DPWMEV2)
R/W-0 0000 0011 0000 0000
Type Reset
R/W 0 0000
Configures the location of Event 2. Value equals number of PCLK clock periods in
0011
Bits 17:4 and number of high resolution clock phases of PCL in Bits 3:0 (dependent
0000
on Bits 3:2 of DPWM Control Register 2).
0000
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EVENT2
Description
Digital Pulse Width Modulator (DPWM)
DPWM 0-3 Registers Reference
0
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