Uart Control Register 0 (Uartctrl0); Uart Control Register 0 (Uartctrl0) Register Field Descriptions; Uart Registers Reference - Texas Instruments UCD3138 Technical Reference Manual

UART Registers Reference

12.7 UART Registers Reference

12.7.1 UART Control Register 0 (UARTCTRL0)

Address FFF7D800 – UART 0 Control Register 0
Address FFF7D900 – UART 1 Control Register 0
7 6
STOP PARITY
R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 12-2. UART Control Register 0 (UARTCTRL0) Register Field Descriptions
Bit Field
7 STOP
6 PARITY
5 PARITY_ENA
4 SYNC_MODE
3 ADDR_MODE
2-0 DATA_SIZE
426
UART Overview
Figure 12-3. UART Control Register 0 (UARTCTRL0)
5 4
PARITY_ENA SYNC_MODE
R/W-0 R/W-0
Type Reset
R/W 0
Configures stop bits for each frame
0 = One STOP bit included in each frame (Default)
1 = Two STOP bits included in each frame
R/W 0
Sets odd or even parity
0 = Even parity (Default)
1 = Odd parity
R/W 0
Enables parity transmission
0 = No parity bit included in each frame (Default)
1 = One parity bit included in each frame
R/W 0
Selects between Synchronous mode and Asynchronous mode
0 = Synchronous (Not supported in UCD3138, set this bit always to one)
1 = Asynchronous
R/W 0
Selects between Idle and Address Bit Mode
0 = IDLE Line mode with no Address bit (Default)
1 = Address Bit mode with one Address bit
R/W 000
Determines the TX and RX byte size
000 = 1 bit of data (Default)
001 = 2 bit of data
010 = 3 bits of data
011 = 4 bits of data
100 = 5 bits of data
101 = 6 bits of data
110 = 7 bits of data
111 = 8 bits of data
Copyright © 2016, Texas Instruments Incorporated
3 2
ADDR_MODE
R/W-0
Description
SNIU028A – February 2016 – Revised April 2016
www.ti.com
0
DATA_SIZE
R/W-000
Submit Documentation Feedback