Analog Peak Current Mode Control Register (Apcmctrl); Analog Peak Current Mode Control Register (Apcmctrl)Register Field Descriptions - Texas Instruments UCD3138 Technical Reference Manual

Loop Mux Registers Reference

5.14.28 Analog Peak Current Mode Control Register (APCMCTRL)

Address 00020070
Figure 5-29. Analog Peak Current Mode Control Register (APCMCTRL)
3
PCM_LATCH_EN
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5-29. Analog Peak Current Mode Control Register (APCMCTRL)Register Field Descriptions
Bit Field
3 PCM_LATCH_EN
2-1 PCM_FE_SEL
0 PCM_EN
224
Loop Mux
2
PCM_FE_SEL
Type Reset
R/W 0
Enables latching of Peak Current Flag to end of frame
0 = PCM Flag is not latched to end of PCM Frame (Default)
1 = PCM Flag is latched to end of PCM Frame
R/W 00
Selects source of Front End Comparator output for Analog Peak Current Mode
Control
0 = Front End Control 0 Comparator output selected (Default)
1 = Front End Control 1 Comparator output selected
2 = Front End Control 2 Comparator output selected
R/W 0
Analog Peak Current Mode Control Module Enable
0 = Analog Peak Current Mode Control Module disabled (Default)
1 = Analog Peak Current Mode Control Module enabled
Copyright © 2016, Texas Instruments Incorporated
1
R/W-00
Description
SNIU028A – February 2016 – Revised April 2016
www.ti.com
0
PCM_EN
R/W-0
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