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As previously mentioned UCD3138 (ARM7TDMI-S) is based on Von-Neumann architecture, with a single
bus providing access to different memory modules and peripherals.
Within the UCD3138 architecture, there is a 2048x32 bit Boot ROM that contains the initial firmware
startup routines for PMBUS communication and non-volatile (FLASH) memory download. This Boot ROM
is executed after power up reset and the code will determine if there is a valid FLASH program written. If a
valid program is present, the ROM code branches to the main FLASH program execution.
UCD3138 also supports customization of Boot program by allowing an alternative booting routine to be
executed from program Flash. This UCD3138 feature enables assignment of unique address to each
device therefore supporting firmware reprogramming even when several devices are connected on the
same communication bus.
This is accomplished using multiple checksums at different locations in Program FLASH. Other 3138
family members even support multiple program images. See
is done.
Two separate FLASH memories are present inside the device. The 32KB Program FLASH memory is
organized as an 8Kx32 bit memory block and is intended to be for firmware program space. The block is
configured with page erase capability for erasing blocks as small as 1KB per page, or with a mass erase
for erasing the entire program FLASH array. The FLASH endurance is specified at 1000 erase/write
cycles and the data retention is good for 100 years. The 2KB Data FLASH array is organized as a 512x32
memory. The Data FLASH is intended for firmware data value storage and data logging. Thus, the Data
FLASH is specified as a high endurance memory of 20K cycles with embedded ECC (Error correction
code) mechanism. The Data Flash can be mass erased, or erased in 32 byte blocks.
The ARM7 has its reset and interrupt vectors mapped starting at address zero. At reset, the ROM is
mapped to start at zero. In program flash execution, the program flash needs to be mapped to zero. The
UCD3138 has programmable memory addressing which is used by the Boot ROM to remap the
memories. With the UCD3138, there is no need for the customer to remap memory. However, with the
3138064 and other family members, it may be useful. These chips have more than one program flash
block. This makes it possible to store more than one program version on the same chip. Each version can
be mapped to location zero for efficient
For run time data storage and scratchpad memory, a 4KB RAM is available for firmware usage. The RAM
is organized as a 1024x32 bit array. This feature can even be used to download a new version while
executing from an existing one. It is possible to switch versions without powering down the supply. When
the device comes out of reset, the program memories are mapped as follows:
Table 15-1. ROM and Program Flash Memory Map (ROM Operation)
Module
Boot ROM
Program Flash 0
Program Flash 1
Program Flash 2
Program Flash 3
SNIU028A – February 2016 – Revised April 2016
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Size (KB)
Memory Select
8
0
32
1
32
17
32
18
32
19
Copyright © 2016, Texas Instruments Incorporated
SNIU028A – February 2016 – Revised April 2016
Chapter 13
for more information on how this
Start Address
3138
3138064/A64
0
0
0x10000
0x40000
–
0x48000
–
–
–
–
Chapter 15
Memory
3138128
0
0x40000
0x48000
0x50000
0x58000
465
Memory
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