Texas Instruments UCD3138 Technical Reference Manual page 26

7-1. Fault IO Direction Register (FAULTDIR) Register Field Descriptions
7-2. Fault Input Register (FAULTIN) Register Field Descriptions
7-3. Fault Output Register (FAULTOUT) Register Field Descriptions
7-4. Fault Interrupt Enable Register (FAULTINTENA) Register Field Descriptions
7-5. Fault Interrupt Polarity Register (FAULTINTPOL) Register Field Descriptions
7-6. Fault Interrupt Pending Register (FAULTINTPEND) Register Field Descriptions
7-7. External Interrupt Direction Register (EXTINTDIR) Register Field Descriptions
7-8. External Interrupt Input Register (EXTINTIN) Register Field Descriptions
7-9. External Interrupt Output Register (EXTINTOUT) Register Field Descriptions
7-10. External Interrupt Enable Register (EXTINTENA) Register Field Descriptions
7-11. External Interrupt Polarity Register (EXTTINTPOL) Register Field Descriptions
7-12. External Interrupt Pending Register (EXTINTPEND) Register Field Descriptions
8-1. Temp Sensor Control Register (TEMPSENCTRL) Register Field Descriptions
8-2. PMBus Control Register 3 (PMBCTRL3) Register Field Descriptions
8-3. Selection of "Dual Sample and Hold" Channel
8-4. ADC Control Register (ADCCTRL) Register Field Descriptions
8-5. ADC Control Register (ADCCTRL) Register Field Descriptions
8-6. ADC Status Register (ADCSTAT) Register Field Descriptions
8-7. ADC Test Control Register (ADCTSTCTRL) Register Field Descriptions
8-8. ADC Sequence Select Register 0 (ADCSEQSEL0) Register Field Descriptions
8-9. ADC Sequence Select Register 1 (ADCSEQSEL1) Register Field Descriptions
8-10. ADC Sequence Select Register 2 (ADCSEQSEL2) Register Field Descriptions
8-11. ADC Sequence Select Register 3 (ADCSEQSEL3) Register Field Descriptions
8-12. ADC Result Registers 0-15 (ADCRESULTx, x=0:15) Register Field Descriptions
8-13. ADC Averaged Result Registers 0-5 (ADCAVGRESULTx, x=0:15) Register Field Descriptions
8-14. ADC Digital Compare Limits Register 0-5 (ADCCOMPLIMx, x=0:5) Register Field Descriptions
8-15. ADC Digital Compare Enable Register (ADCCOMPEN) Register Field Descriptions
8-16. ADC Digital Compare Results Register (ADCCOMPRESULT) Register Field Descriptions
8-17. ADC Averaging Control Register (ADCAVGCTRL) Register Field Descriptions
..................................................................................................................
9-1. Tolerance
..............................................................................................................................
9-2.
9-3. Package ID Register (PKGID) Register Field Descriptions
9-4. Brownout Register (BROWNOUT) Register Field Descriptions
9-5. Temp Sensor Control Register (TEMPSENCTRL) Register Field Descriptions
9-6. Bits 9-8: EXT_TRIG_MUX_SEL - EXT_TRIG Pin Mux Select
9-7. Bits 7-6: JTAG_CLK_MUX_SEL - TCK Pin Mux Select
9-8. Bits 5-4: JTAG_DATA_MUX_SEL - TDO/TDI Pin Mux Select
9-9. Bits 3-2: SYNC_MUX_SEL - SYNC Pin Mux Select
9-10. Bit 1: UART_MUX_SEL - SCL/SDA Pins Mux Select
9-11. Bit 0: PMBUS_MUX_SEL - SCL/SDA Pins Mux Select
9-12. Current Sharing Control Register (CSCTRL) Register Field Descriptions
..............................................................................................................................
9-13.
9-14. Temperature Reference Register (TEMPREF) Register Field Descriptions
9-15. Power Disable Control Register (PWRDISCTRL) Register Field Descriptions
9-16. ADC Control Register (ADCCTRL) Register Field Descriptions
9-17. Global I/O OE Register (GLBIOOE) Register Field Descriptions
9-18. Global I/O Open Drain Control Register (GLBIOOD) Register Field Descriptions
9-19. Global I/O Value Register (GLBIOVAL) Register Field Descriptions
9-20. Global I/O Read Register (GLBIOREAD) Register Field Descriptions
26
List of Tables
.......................................................................
............................................................
................................................................
...............................................................
.............................................................
Copyright © 2016, Texas Instruments Incorporated
.............................................
........................................................
...................................................
...................................
...................................
................................
.................................
........................................
...................................
...................................
................................
...............................
..................................
.............................................
....................................................
....................................................
.....................................................
.........................................
................................
................................
................................
................................
...............................
...........................
.................................
.........................................................
....................................................
..................................
.....................................................
.....................................................
........................................
......................................
...................................
....................................................
...................................................
...............................
..............................................
............................................
SNIU028A - February 2016 - Revised April 2016
Submit Documentation Feedback
www.ti.com
285
286
287
288
289
290
291
292
293
294
295
296
306
307
308
309
316
318
319
320
321
322
323
324
..............
325
.............
326
327
....................
329
331
335
335
336
337
338
339
339
339
339
339
339
340
340
341
342
346
347
348
349
350