Dpwm Auto Config Max Register (Dpwmautomax); Dpwm Auto Config Max Register (Dpwmautomax) Register Field Descriptions - Texas Instruments UCD3138 Technical Reference Manual

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2.31.31 DPWM Auto Config Max Register (DPWMAUTOMAX)

Address 00050078 – DPWM 3 Auto Config Max Register
Address 00070078 – DPWM 2 Auto Config Max Register
Address 000A0078 – DPWM 1 Auto Config Max Register
Address 000D0078 – DPWM 0 Auto Config Max Register
31
PWM_B_INTRA_MUX
R/W-000
23 22
CBC_PWM_C MULTI_MODE
_EN _CLA_B_OFF
R/W-000 R/W-0
15 14
Reserved
R-00
7 6
Reserved
R-0000 0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 2-36. DPWM Auto Config Max Register (DPWMAUTOMAX) Register Field Descriptions
Bit Field
31-28 PWM_B_INTRA
_MUX
27-24 PWM_A_INTRA
_MUX
23 CBC_PWM_C_EN R/W
SNIU028A – February 2016 – Revised April 2016
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Figure 2-47. DPWM Auto Config Max Register (DPWMAUTOMAX)
28
21 20
Reserved CBC_PWM_AB
_EN
R-0 R/W-0
13 12
CBC_SYNC RESON_MODE
_CUR_LIMIT _FIXED_DUTY
_EN _EN
R/W-0 R/W-0
4
PWM_MODE
R/W-00
Type Reset
R/W 000
Interchanges DPWM signals post edge generation
0 = Pass-through (Default)
1 = Edge-gen output, this module
2 = PWM-C, this module
3 = Crossover, this module
4 = Pass-through below A
5 = Pass-through below B
6 = Pass-through below C
7 = Pass-through below level-2 C
8 = Pass-through below level-3 C
R/W 000
Combines DPWM signals are prior to HR module
0 = Pass-through (Default)
1 = Edge-gen output, this module
2 = PWM-C, this module
3 = Crossover, this module
4 = Pass-through below A
5 = Pass-through below B
6 = Pass-through below C
6 = Pass-through below C
7 = Pass-through below level-2 C
8 = Pass-through below level-3 C
000
Sets if Fault CBC changes output waveform for PWM-C
0 = PWM-C unaffected by Fault CBC (Default)
1 = PWM-C affected by Fault CBC
Copyright © 2016, Texas Instruments Incorporated
DPWM 0-3 Registers Reference
27
PWM_A_INTRA_MUX
R/W-000
19 18
CBC_ADV Reserved
_CNT_EN
R/W-0 R-0
11
Reserved
R-0000 0
3 2
Reserved
R-00
Description
Digital Pulse Width Modulator (DPWM)
24
17 16
MASTER
_SYNC_CNTL
_SEL
R/W-0
8
1 0
CLA_EN Reserved
R/W-0 R-0
103