Irq Index Offset Vector Register (Irqivec); Irq Index Offset Vector Register (Irqivec) Register Field Descriptions - Texas Instruments UCD3138 Technical Reference Manual

IRQ Index Offset Vector Register (IRQIVEC)

18.1 IRQ Index Offset Vector Register (IRQIVEC)
Address FFFFFF20
7
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 18-1. IRQ Index Offset Vector Register (IRQIVEC) Register Field Descriptions
Bit Field
7-0 IRQIVEC
526
CIM – Central Interrupt Module Registers Reference
Figure 18-1. IRQ Index Offset Vector Register (IRQIVEC)
Type Reset
R 0
Index of the IRQ Pending Interrupt (Cleared upon read)
0 = No interrupt pending
1 = Pending interrupt on Channel 0
2 = Pending interrupt on Channel 1
N = Pending interrupt on Channel N-1, where N <= 31
Copyright © 2016, Texas Instruments Incorporated
IRQIVEC
R-0
Description
SNIU028A – February 2016 – Revised April 2016
www.ti.com
0
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