Table Of Contents - Texas Instruments UCD3138 Technical Reference Manual

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1 Introduction
1.1 Scope of This Document
1.2 A Guide to Other Documentation for all Members of UCD3138 Family of Products
2 Digital Pulse Width Modulator (DPWM)
2.1 DPWM Block Diagram
2.2 Introduction to DPWM (DPWM Multi-Mode, Open Loop)
2.3 DPWM Normal Mode
2.4 DPWM Phase Shift Mode
2.5 DPWM Multiple Output Mode (Multi Mode)
2.6 DPWM Resonant Mode
2.7 Triangular Mode
2.8 DPWM Leading Edge Mode
2.9 Sync FET Ramp and IDE Calculation
2.10 Automatic Mode Switching
2.10.1 Resonant LLC Example
2.10.2 Mechanism for Automatic Mode Switching
2.11 DPWMC, Edge Generation, IntraMax
2.12 Time Resolution of Various DPWM Registers
2.13 PWM Counter and Clocks
2.14 DPWM Registers - Overview
2.15 DPWM Control Register 0 (DPWMCTRL0)
2.15.1 DPWM Auto Config Mid and Max Registers
2.15.2 Intra Mux
2.15.3 Cycle by Cycle Current Limit Enable
2.15.4 Multi Mode On/Off
2.15.5 Minimum Duty Mode
2.15.6 Master Sync Control Select
2.15.7 Master Sync Slave Enable
2.15.8 D Enable
2.15.9 Resonant Mode Fixed Duty Enable
2.15.10 DPWM A and B Fault Priority
2.15.11 Blank Enable
2.15.12 DPWM Mode
2.15.13 DPWM Invert
2.15.14 1.15.14 Filter Enable (CLA_EN)
2.15.15 DPWM Enable
2.16 DPWM Control Register 1
2.16.1 Period Counter Preset Enable
2.16.2 Sync FET Ramp Enable
2.16.3 Burst Mode Enable
2.16.4 Current/Flux Balancing Duty Adjust
2.16.5 1.16.5 Sync Out Divisor Selection
2.16.6 FIlter Scale
2.16.7 External Sync Enable
2.16.8 Cycle By Cycle B Side Active Enable
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Copyright © 2016, Texas Instruments Incorporated
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SNIU028A - February 2016 - Revised April 2016
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