Dpwm Event 3 Register (Dpwmev3); Dpwm Event 3 Register (Dpwmev3) Register Field Descriptions - Texas Instruments UCD3138 Technical Reference Manual

DPWM 0-3 Registers Reference

2.31.7 DPWM Event 3 Register (DPWMEV3)

Address 00050018 – Loop 4 DPWM Event 3 Register
Address 00070018 – Loop 3 DPWM Event 3 Register
Address 000A0018 – Loop 2 DPWM Event 3 Register
Address 000D0018 – Loop 1 DPWM Event 3 Register
17
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 2-12. DPWM Event 3 Register (DPWMEV3) Register Field Descriptions
Bit Field
17-0 EVENT3
78
Digital Pulse Width Modulator (DPWM)
Figure 2-23. DPWM Event 3 Register (DPWMEV3)
R/W-00 0000 0011 1110 0000
Type Reset
R/W 00 0000
Configures the location of Event 3. Value equals number of PCLK clock periods in
0011
Bits 17:4 and number of high resolution clock phases of PCL in Bits 3:0.
1110
0000
Copyright © 2016, Texas Instruments Incorporated
EVENT3
Description
SNIU028A – February 2016 – Revised April 2016
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