Texas Instruments UCD3138 Technical Reference Manual page 5

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3.7.13 SAR Control Register (SARCTRL)
3.7.14 SAR Timing Register (SARTIMING)
3.7.15 EADC Value Register (EADCVALUE)
3.7.16 EADC Raw Value Register (EADCRAWVALUE)
3.7.17 DAC Status Register (DACSTAT)
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4 Filter
4.1 Filter Math Details
4.1.1 Filter Input and Branch Calculations
4.1.2 Proportional Branch
4.1.3 Integral Branch
4.1.4 Differential Branch
4.1.5 Add, Saturate, Scale and Clamp
4.1.6 Filter Output Stage
4.2 Filter Status Register
4.3 Filter Control Register
4.3.1 Filter Enable
4.3.2 Use CPU Sample
4.3.3 Force Start
4.3.4 Kp Off, Kd Off, Ki Off
4.3.5 Kd Stall, Ki Stall
4.3.6 Nonlinear Mode
4.3.7 Output Scaling
4.3.8 Output Multiplier Select
4.3.9 Switching Period as Output Multiplier
4.3.10 KComp as Output Multiplier
4.3.11 Feed Forward as Output Multiplier
4.3.12 Period Multiplier Select
4.3.13 Ki Adder Mode
4.4 XN, YN Read and Write Registers
4.4.1 CPU Xn Register
4.4.2 Filter XN Read Register
4.4.3 Filter YN Read Registers
4.5 Coefficient Configuration Register
4.6 Kp, Ki, and Kd Registers
4.7 Alpha Registers
4.8 Filter Nonlinear Limit Registers
4.9 Clamp Registers
4.10 Filter Preset Register
4.11 Filter Registers Reference
4.11.1 Filter Status Register (FILTERSTATUS)
4.11.2 Filter Control Register (FILTERCTRL)
4.11.3 CPU XN Register (CPUXN)
4.11.4 Filter XN Read Register (FILTERXNREAD)
4.11.5 Filter KI_YN Read Register (FILTERKIYNREAD)
4.11.6 Filter KD_YN Read Register (FILTERKDYNREAD)
4.11.7 Filter YN Read Register (FILTERYNREAD)
4.11.8 Coefficient Configuration Register (COEFCONFIG)
4.11.9 Filter KP Coefficient 0 Register (FILTERKPCOEF0)
4.11.10 Filter KP Coefficient 1 Register (FILTERKPCOEF1)
4.11.11 Filter KI Coefficient 0 Register (FILTERKICOEF0)
4.11.12 Filter KI Coefficient 1 Register (FILTERKICOEF1)
4.11.13 Filter KD Coefficient 0 Register (FILTERKDCOEF0)
4.11.14 Filter KD Coefficient 1 Register (FILTERKDCOEF1)
SNIU028A - February 2016 - Revised April 2016
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Copyright © 2016, Texas Instruments Incorporated
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