Global I/O Oe Register (Glbiooe); Global I/O Oe Register (Glbiooe) Register Field Descriptions - Texas Instruments UCD3138 Technical Reference Manual

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9.12.2 Global I/O OE Register (GLBIOOE)

Address FFF7F01C
29
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 9-17. Global I/O OE Register (GLBIOOE) Register Field Descriptions
Bit Field
29-0 GLOBAL_IO_OE
Bit assignment is done by this table:
BIT
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
SNIU028A – February 2016 – Revised April 2016
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Figure 9-12. Global I/O OE Register (GLBIOOE)
GLOBAL_IO_OE
R/W-00 0000 0000 0000 0000 0000 0000 0000
Type Reset
R/W 00 0000
This register controls the output enable signals for all digital I/O pins
0000
0 = Input (Default)
0000
1 = Output
0000
0000
0000
0000
PIN_NAME
FAULT[3]
ADC_EXT_TRIG
TCK
TDO
TMS
TDI
SCI_TX[1]
SCI_TX[0]
SCI_RX[1]
SCI_RX[0]
TMR_CAP
TMR_PWM[1]
TMR_PWM[0]
PMBUS-CLK
PMBUS-DATA
Copyright © 2016, Texas Instruments Incorporated
Description
BIT
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Advanced Power Management Control Functions
Registers
0
PIN_NAME
CONTROL
ALERT
EXT_INT
FAULT[2]
FAULT[1]
FAULT[0]
SYNC
DPWM3B
DPWM3A
DPWM2B
DPWM2A
DPWM1B
DPWM1A
DPWM0B
DPWM0A
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