Cycle Adjustment Limit Register (Cycadjlim); Cycle Adjustment Limit Register (Cycadjlim) Register Field Descriptions - Texas Instruments UCD3138 Technical Reference Manual

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5.14.19 Cycle Adjustment Limit Register (CYCADJLIM)

Address 00020048
28
CYC_ADJ_UPPER_LIMIT
R/W-0 0000 0000 0000
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5-20. Cycle Adjustment Limit Register (CYCADJLIM) Register Field Descriptions
Bit Field
28-16 CYC_ADJ
_UPPER_LIMIT
15-13 Reserved
12-0 CYC_ADJ
_LOWER_LIM
SNIU028A – February 2016 – Revised April 2016
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Figure 5-20. Cycle Adjustment Limit Register (CYCADJLIM)
16 15
Type Reset
R/W 0 0000
Cycle Adjustment Calculation signed upper limit value, output of Cycle Adjustment
0000
Calculation is clamped at the upper limit, if calculated result exceeds the upper limit.
0000
LSB resolution equals High Frequency Oscillator period/16.
R 000
R/W 0 0000
Cycle Adjustment Calculation signed lower limit value, output of Cycle Adjustment
0000
Calculation is clamped at the lower limit, if calculated result falls below the lower
0000
limit. LSB resolution equals High Frequency Oscillator period/16.
Copyright © 2016, Texas Instruments Incorporated
13 12
Reserved
R-000
Description
Loop Mux Registers Reference
CYC_ADJ_LOWER_LIM
R/W-0 0000 0000 0000
Loop Mux
0
215