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Fault Pin Configuration
6.4
Fault Pin Configuration
There are 4 fault pins, Fault 0 to Fault 3. Their configuration is very simple.
•
FAULTx_POL sets polarity
•
FAULTx_INT_EN enables the interrupt
•
FAULTx_DET_EN enables fault detection.
All these bits are in the EXTFAULTCTRL register. Like the Analog Comparators, the fault pins are
sampled at the MCLK rate.
6.5
Analog Peak Current
Analog Peak Current is another input to the Fault Mux. It is not technically a fault, since it is controls the
normal operation of a power supply based on peak current mode control. The Analog Peak Current signal
comes from a Front End, and can only be routed to the CBC (Cycle by Cycle) input of the DPWM. For
additional information consult the reference firmware provided with UCD3138PSFBEVM-029 EVM and TI
application note on Phase Shift Full Bridge (Peak Current mode control) implementation.
6.6
Fault Status Registers
There are two registers which give the fault detection status: FAULTMUXINTSTAT and
FAULTMUXRAWSTAT.
Both have the same bits, but they mean different things.
FAULTMUXRAWSTAT shows the instantaneous status of each fault.
FAULTMUXINTSTAT shows any faults which:
•
Have occured since the last read of FAULTMUXINTSTAT
•
Have interrupts enabled
This is especially useful for detecting faults which may occur only for short times during a period. Reading
from this register clears the fault from the fault detection interrupt logic. This interrupt logic is independent
of the signals routed to the Fault Mux and to the DPWM. These signals are latched only in the DPWM
logic, not anywhere else.
The registers also have bits for LFO_FAIL (Low Frequency Oscillator Fail) and for DCM_DETECT
(Discontinuous Mode Detected). These sources are described elsewhere. Neither of these signals is used
as an input to the Fault Mux.
6.7
Fault Mux Control Registers
There are 4 DPWM modules, 0-3. Each DPWM module has 4 fault inputs, CLIM, AB, A, and B.
There are 3 fault Mux registers for each DPWM:
•
DPWMxCLIM – controls CLIM, also known as CBC
•
DPWMxFLTABDET – controls the AB fault input
•
DPWMxFAULTDET – controls the A and B fault inputs.
Programming these registers is very simple. There is a bit for each fault detection source in each register.
Setting it connects that fault detection source to the fault input and DPWM for that register. Here is an
example:
FaultMuxRegs.DPWM0FLTABDET.bit.ACOMP_B_EN = 1;
// Connect analog comp B to DPWM0 fault input AB
Controlling the A and B fault inputs in the same register works like this:
FaultMuxRegs.DPWM0FAULTDET.bit.PWMA_ACOMP_B_EN = 1;
//Connect analog comparator B to DPWM0 fault A
FaultMuxRegs.DPWM0FAULTDET.bit.PWMB_ACOMP_B_EN = 1;
//Connect analog comparator B to DPWM0 fault B
230
Fault Mux
Copyright © 2016, Texas Instruments Incorporated
SNIU028A – February 2016 – Revised April 2016
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