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The Loop Mux controls the connections between the different parts of the control loop – the Front End, the
Filter, and the DPWM:
•
Front End Control Mux 0, 1, 2 – controls how DPWMs trigger the front end ramp module and DAC
dither.
•
Sample Trigger Control Register – controls how DPWMs trigger the EADC
•
External DAC control Register – controls what DAC setting is used for each Front End
•
Filter Mux – Selects Sources of data for the filter
•
DPWM Mux Register – Selects inputs for the DPWM
The Loop Mux also has several registers which control multiple modules in one register:
•
Global Enable Register (GLBEN) – enables Front Ends and DPWMs simultaneously
•
PWM Global Period Register (PWMGLBPRD) – permits changing multiple periods simultaneously
•
Sync Control Register (SYNCCTRL) – Configures the SYNC pin
In addition, it controls several modules which tie multiple parts together and have logic of their own:
•
Constant Power/Constant Current (CPCC) Module
•
Cycle Adjustment Module (used for balancing current and flux)
•
Light Load Module
•
Analog Peak Current Mode (PCM) Module
Table 5-1
shows the connections of the Loop Mux. "I" indicates an input to the Loop Mux register or
module, "O" indicates an output.
Registers
FECTRLxMUX
SAMPTRIGCTRL
EXTDACCTRL
FILTERMUX
FILTERKCOMPx
DPWMMUX
GLBEN
PWMGLBPRD
SYNCCTRL
Modules
CPCC
Cycle Adjustment
Light Load
Analog PCM
This chapter covers the Loop Mux registers. The modules have chapters of their own.
SNIU028A – February 2016 – Revised April 2016
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Front End
EADC
Ramp
O
O
O
I
I
O
O
I
I
I
I
O
Copyright © 2016, Texas Instruments Incorporated
SNIU028A – February 2016 – Revised April 2016
Table 5-1.
Filter
DPWM
DAC
I
IO
I
IO
O
I
O
I
IO
I
O
I
Chapter 5
Loop Mux
Loop Mux
CPCC
KCOMP
I
I
I
I
IO
O
O
IO
O
IO
O
O
Loop Mux
I
185
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