Texas Instruments UCD3138 Technical Reference Manual page 34

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Topic
2.1 DPWM Block Diagram
2.2 Introduction to DPWM (DPWM Multi-Mode, Open Loop)
2.3 DPWM Normal Mode
2.4 DPWM Phase Shift Mode
2.5 DPWM Multiple Output Mode (Multi Mode)
2.6 DPWM Resonant Mode
2.7 Triangular Mode
2.8 DPWM Leading Edge Mode
2.9 Sync FET Ramp and IDE Calculation
2.10 Automatic Mode Switching
2.11 DPWMC, Edge Generation, IntraMax
2.12 Time Resolution of Various DPWM Registers
2.13 PWM Counter and Clocks
2.14 DPWM Registers - Overview
2.15 DPWM Control Register 0 (DPWMCTRL0)
2.16 DPWM Control Register 1
2.17 DPWM Control Register 2
2.18 Period and Event Registers
2.19 Phase Trigger Registers
2.20 Cycle Adjust Registers
2.21 Resonant Duty Register
2.22 DPWM Fault Control Register
2.23 DPWM Overflow Register
2.24 DPWM Interrupt Register
2.25 DPWM Counter Preset Register
2.26 Blanking Registers
2.27 DPWM Adaptive Sample Register
2.28 DPWM Fault Status Register
2.29 DPWM Auto Switch Registers
2.30 DPWM Edge PWM Generation Register
2.31 DPWM 0-3 Registers Reference
34
Digital Pulse Width Modulator (DPWM)
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Copyright © 2016, Texas Instruments Incorporated
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SNIU028A – February 2016 – Revised April 2016
www.ti.com
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