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3.7.7 DAC Saturation Step Register (DACSATSTEP)
Address 0x0008_0018 – Front End Control 2 DAC Saturation Step Register
Address 0x000B_0018 – Front End Control 1 DAC Saturation Step Register
Address 0x000E_0018 – Front End Control 0 DAC Saturation Step Register
13
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 3-9. DAC Saturation Step Register (DACSATSTEP) Register Field Descriptions
Bit
Field
13-0
DAC_SAT_STEP
SNIU028A – February 2016 – Revised April 2016
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Figure 3-15. DAC Saturation Step Register (DACSATSTEP)
DAC_SAT_STEP
R/W-00 0000 0000 0000 0000
Type
Reset
R/W
00 0000
Programmable DAC Saturation Step, LSB equals 0.009765625mV
0000
0 = DAC not adjusted on EADC saturation during ramp (Default)
0000
1 = DAC adjusted by 1 DAC count on EADC saturation during ramp
.....
1023 = DAC adjusted by 1023 DAC counts on EADC saturation during ramp
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Front End Control Registers
Description
0
131
Front End