Memory Fine Base Address Low Register 0 (Mfbalr0); Memory Fine Base Address Low Register 0 (Mfbalr0) Register Field Descriptions - Texas Instruments UCD3138 Technical Reference Manual

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15.2.2 Memory Fine Base Address Low Register 0 (MFBALR0)

Address FFFFFE04
Figure 15-7. Memory Fine Base Address Low Register 0 (MFBALR0)
15
ADDRESS[15:10]
R/W-000000
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 15-11. Memory Fine Base Address Low Register 0 (MFBALR0) Register Field Descriptions
Bit Field
15-10 ADDRESS[15:10]
8 MS
7-4 BLOCK_SIZE
1 RONLY
0 PRIV
SNIU028A – February 2016 – Revised April 2016
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10
Type Reset
R/W 000000
6 Least Significant Bits of the Base Address. The Base Address sets the 22 most
significant bits of the memory address.
R/W 0
Memory Map Select
0 = Memory Map configuration not updated (Default)
1 = Enables the fine and coarse memory selects and activates the memory map
R/W 0000
Configures the size of the memory
0000 = Memory select is disabled (Default)
0001 = 1KB
0010 = 2KB
0011 = 4KB
0100 = 8KB
0101 = 16KB
0110 = 32KB
0111 = 64KB
1000 = 128KB
1001 = 256KB
1010 = 512KB
1011 = 1MB
1100 = 2MB
1101 = 4MB
1110 = 8MB
1111 = 16MB
R/W 0
Read-only protection. This bit sets read-only protection for the memory selected by
the memory select. An illegal access exception is generated when a write is
attempted to the memory.
0 = Read/write access to memory (Default)
1 = Read accesses to memory only
R/W 0
Privilege mode protection. This bit sets privilege mode protection for the memory
Registration selected by the memory select. An illegal access exception is generated
on any access to memory protected by privilege mode.
0 = User/privilege mode accesses to memory (Default)
1 = Privilege mode accesses to memory only
Copyright © 2016, Texas Instruments Incorporated
DEC – Address Manager Registers Reference
8 7
MS BLOCK_SIZE
R/W-0 R/W-0000
Description
4 1 0
RONLY PRIV
R/W-0 R/W-0
475
Memory