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Ramp Module
The DAC Ramp end point is taken from the Ramp DAC Ending Value register
FeCtrl0Regs.RAMPDACEND.bit.RAMP_DAC_VALUE = 100 * 16;
//set 10 bit DAC to 100 (.15625 Volts)
These two values above will lead to a ramp up. Both of these registers are 14 bits, so a dithering value is
supported at the beginning and end of the ramp.
The DAC will stay at the end value until something else is asked for. Before another ramp is done, though,
this end value should be written to the DAC_VALUE register so that the ramp will start from the same
place.
3.3.3 DAC Ramp Steps
The DAC Ramp steps are controlled by two bit fields, the Switch Cycles per Step field and the DAC Step
register.
The Switch Cycles per Step bits determine how many DPWM inputs are required before 1 step occurs. It
has 7 bits, so the register can hold values from 0 to 127, corresponding to 1 to 128 cycles.
The Switch Cycle signal is a DPWM output. The DPWM output used for the Ramp module is the same as
the one for dither above:
LoopMuxRegs.FECTRL2MUX.bit.DPWM3_B_TRIG_EN = 1;
//set DPWM3B up to trigger dither and ramp modules.
The step size is an unsigned value. The Ramp module logic checks the start and end values. If the start
value is lower than the end value, the step size is added to the DAC value. If the start value is higher than
the end value, the step size is subtracted from the DAC value.
The step size has a 10 bit fractional part, allowing very precise and also very slow ramps. There are 10
fractional bits, below the dither portion of the DAC. There are 8 bits matching the DAC value, including
dither.
13
12
11
10
DAC Value
There is a register, not visible to the programmer, which retains the sum of the fractional bits between
steps.
For instance, suppose that bit 8 was the only bit set in the DAC Step register:
FeCtrl0Regs.DACSTEP.bit.DAC_STEP = 0x100; //set bit 8 in DAC_STEP
Every step, 0x100 would be added to the step register. The sequence would look like this:
120
Front End
DAC_VALUE
9
8
7
6
5
4
3
17
16
15
14
13
DAC
Hidden Step Register
0x000100
0x000200
0x000300
0x000400
Copyright © 2016, Texas Instruments Incorporated
2
1
0
Dither
12
11
10
9
8
7
Dither
DAC_STEP
Figure 3-7.
Table 3-2.
DAC Register
0x0000
0x0000
0x0000
0x0001
SNIU028A – February 2016 – Revised April 2016
6
5
4
3
2
1
Fractional Part
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