Texas Instruments UCD3138 Technical Reference Manual page 27

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9-21. Clock Trim Register (CLKTRIM) (For Factory Test Use Only, Except HFO_LN_FILTER_EN) Register
Field Descriptions
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10-1.
10-2. Timing Parameters from Timing Diagrams
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10-3.
10-4. Simple Timing Parameters (No Timing Diagram)
10-5. PMBUS Control Register 1 (PMBCTRL1) Register Field Descriptions
10-6. PMBus Transmit Data Buffer (PMBTXBUF) Register Field Descriptions
10-7. PMBus Receive Data Register (PMBRXBUF) Register Field Descriptions
10-8. PMBus Acknowledge Register (PMBACK) Register Field Descriptions
10-9. PMBus Status Register (PMBST) Register Field Descriptions
10-10. PMBus Interrupt Mask Register (PMBINTM) Register Field Descriptions
10-11. PMBus Control Register 2 (PMBCTRL2) Register Field Descriptions
10-12. PMBus Hold Slave Address Register (PMBHSA) Register Field Descriptions
10-13. PMBus Control Register 3 (PMBCTRL3) Register Field Descriptions
11-1. 24-bit Counter Data Register (T24CNTDAT) Register Field Descriptions
11-2. 24-bit Counter Control Register (T24CNTCTRL) Register Field Descriptions
11-3. 24-bit Capture Channel Data Register (T24CAPDAT) Register Field Descriptions
11-4. 24-bit Capture Channel Control Register (T24CAPCTRL) Register Field Descriptions
11-5. 24-bit Capture I/O Control and Data Register (T24CAPIO) Register Field Descriptions
11-6. 24-bit Output Compare Channel 0 Data Register (T24CMPDAT0) Register Field Descriptions
11-7. 24-bit Output Compare Channel 1 Data Register (T24CMPDAT1) Register Field Descriptions
11-8. 24-bit Output Compare Channel 0 Control Register (T24CMPCTRL0) Register Field Descriptions
11-9. 24-bit Output Compare Channel 1 Control Register (T24CMPCTRL1) Register Field Descriptions
11-10. PWMx Counter Data Register (T16PWMxCNTDAT) Register Field Descriptions
11-11. PWMx Counter Control Register (T16PWMxCNTCTRL) Register Field Descriptions
11-12. PWMx 16-bit Compare Channel 0-1 Data Register (T16PWMxCMPyDAT) Register Field Descriptions
11-13. PWMx Compare Control Register (T16PWMxCMPCTRL) Register Field Descriptions
11-14. Watchdog Status (WDST) Register Field Descriptions
11-15. Watchdog Control (WDCTRL) Register Field Descriptions
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12-1.
12-2. UART Control Register 0 (UARTCTRL0) Register Field Descriptions
12-3. UART Receive Status Register (UARTRXST) Register Field Descriptions
12-4. UART Transmit Status Register (UARTTXST) Register Field Descriptions
12-5. UART Control Register 3 (UARTCTRL3) Register Field Descriptions
12-6. UART Interrupt Status Register (UARTINTST) Register Field Descriptions
12-7. UART Baud Divisor High Byte Register (UARTHBAUD) Register Field Descriptions
12-8. UART Baud Divisor Middle Byte Register (UARTMBAUD) Register Field Descriptions
12-9. UART Baud Divisor Low Byte Register (UARTLBAUD) Register Field Descriptions
12-10. UART Receive Buffer (UARTRXBUF) Register Field Descriptions
12-11. UART Transmit Buffer (UARTTXBUF) Register Field Descriptions
12-12. UART I/O Control Register (UARTIOCTRLSCLK, UARTIOCTRLRX, UARTIOCTRLTX) Register Field
Descriptions
13-1. ROM Version for the Other Members of the UCD3138 Family
13-2. Boot ROM Mass Erase Data Byte Parameter Values
13-3. Boot ROM Execute Flash Command Byte, Valid Values
13-4. Checksums Used By UCD3138064 Boot ROM Program
13-5. Checksums Used by UCD3138A64 Boot ROM Program
13-6. Checksums Used by UCD3138128 Boot ROM Program
SNIU028A - February 2016 - Revised April 2016
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Copyright © 2016, Texas Instruments Incorporated
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List of Tables
351
354
371
371
371
382
384
385
386
387
389
390
392
393
405
406
407
408
409
410
411
412
413
414
415
.....
416
417
419
420
423
426
427
428
429
430
431
432
433
434
435
436
443
445
446
448
449
450
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