Pmbus Interface/I2C Interface - Texas Instruments UCD3138 Technical Reference Manual

Digital power supply controller
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The UCD3138 family has a powerful and flexible PMBus/I2C interface. It has support for master mode, but
its primary use is in slave mode. Here are some of its features in slave mode:
Supports most I2C functions.
Designed to reduce CPU overhead
– Receives/Transmits up to 4 bytes at once
– Handles all PMBus sequencing in hardware
– Automatic Stop/Start sequence detection in hardware
– Provides automatic optimized clock stretching
– Automatic Acknowledge of Address, Command, and Data
– Can be used with polling alone, no interrupts needed
– Provides automatic PEC generation/checking
– Automatic hardware implementation of Alert arbitration
– Automatic Clock Low Timeout detection in hardware
– Address Mask permits automatic acknowledge of multiple addresses
Flexible
– Supports polling and interrupt-driven firmware
– Can be configured to automatically acknowledge 1, 2, or 3 bytes of data at a time – on the fly.
– Auto or manual acknowledge of Address and Command bytes
– Supports 100 and 400 kHz
– Access to state of each PMBus Pin
Additional features supported on some devices
– 2 address registers permit automatic acknowledgement of any 2 addresses
– 2 PMBus/I2C interfaces on one device
– Clock High Timeout detection in hardware
– Support for I2C in Master mode
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Topic
10.1
PMBus Register Summary
10.2
PMBus Slave Mode Initialization
10.3
PMBus Slave Mode Command Examples
10.4
Avoiding Clock Stretching
10.5
PMBus Slave Mode Low Level Timing
10.6
Effect of MAN_SLAVE_ACK bit on EOM Handling
10.7
Master Mode Operation Reference
10.8
PMBUS Communications Fault Handling
10.9
Other Functions of the PMBus Module
10.10 PMBus Interface Registers Reference
352

PMBus Interface/I2C Interface

PMBus Interface/I2C Interface
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Copyright © 2016, Texas Instruments Incorporated
SNIU028A – February 2016 – Revised April 2016
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SNIU028A – February 2016 – Revised April 2016
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Chapter 10
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