Cycle Adjustment Control Register (Cycadjctrl); Cycle Adjustment Control Register (Cycadjctrl) Register Field Descriptions - Texas Instruments UCD3138 Technical Reference Manual

Loop Mux Registers Reference

5.14.18 Cycle Adjustment Control Register (CYCADJCTRL)

Address 00020044
9
CYC_ADJ_GAIN
R/W-000
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5-19. Cycle Adjustment Control Register (CYCADJCTRL) Register Field Descriptions
Bit Field
9-7 CYC_ADJ_GAIN
6-5 CYC_ADJ_SYNC
4-3 SECOND
_SAMPLE_SEL
2-1 FIRST_SAMPLE
_SEL
0 CYC_ADJ_EN
214
Loop Mux
Figure 5-19. Cycle Adjustment Control Register (CYCADJCTRL)
7 6 5
CYC_ADJ_SYNC
R/W-00
Type Reset
R/W 000
Configures gain of Cycle Adjustment calculation
0 = 1x gain (Default)
1 = 2x gain
2 = 4x gain
3 = 8x gain
4 = 16x gain
5 = 32x gain
6 = 64x gain
7 = 128x gain
R/W 00
Selects which DPWM A trigger synchronizes cycle adjustment calculation, first 2
samples after receipt of DPWM A trigger will be used for Cycle Adjustment
Calculation.
0 = DPWM-1A trigger selected (Default)
1 = DPWM-2A trigger selected 2 = DPWM-3A trigger selected 3 = DPWM-4A trigger
selected
R/W 00
Configures Front End Module Data used for Second Sample of Cycle Adjustment
Calculation
0 = Front End Module 0 Error Data selected (Default)
1 = Front End Module 1 Error Data selected
2 = Front End Module 2 Error Data selected
R/W 00
Configures Front End Module Data used for First Sample of Cycle Adjustment
Calculation
0 = Front End Module 0 Error Data selected (Default)
1 = Front End Module 1 Error Data selected
2 = Front End Module 2 Error Data selected
R/W 0
Cycle Adjustment Calculation Enable
0 = Cycle Adjustment Calculation disabled (Default)
1 = Cycle Adjustment Calculation enabled
Copyright © 2016, Texas Instruments Incorporated
4 3
SECOND_SAMPLE_SEL FIRST_SAMPLE_SEL
R/W-00
Description
SNIU028A – February 2016 – Revised April 2016
www.ti.com
2 1 0
CYC_ADJ
_EN
R/W-00 R/W-0
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