Pmbus Interrupt Mask Register (Pmbintm); Pmbus Interrupt Mask Register (Pmbintm) Register Field Descriptions - Texas Instruments UCD3138 Technical Reference Manual

www.ti.com

10.10.6 PMBus Interrupt Mask Register (PMBINTM)

Address FFF7F614
9 8
CLK_HIGH LOST_ARB CONTROL
_DETECT
R/W-1 R/W-1
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 10-10. PMBus Interrupt Mask Register (PMBINTM) Register Field Descriptions
Bit Field
9 CLK_HIGH_
DETECT
8 LOST_ARB
7 CONTROL
6 ALERT
5 EOM
4 SLAVE_ADDR_
READY
3 DATA_REQUEST
2 DATA_READY
1 BUS_LOW_
TIMEOUT
0 BUS_FREE
SNIU028A – February 2016 – Revised April 2016
Submit Documentation Feedback
Figure 10-58. PMBus Interrupt Mask Register (PMBINTM)
7 6 5
ALERT EOM
R/W-1 R/W-1 R/W-1
Type Reset
R/W 1
Clock High Detection Interrupt Mask
0 = Generates interrupt if clock high exceeds 50us during message
1 = Disables interrupt generation for Clock High detection (Default)
R/W 1
Lost Arbitration Interrupt Mask
0 = Generates interrupt upon assertion of Lost Arbitration flag
1 = Disables interrupt generation upon assertion of Lost Arbitration flag (Default)
R/W 1
Control Detection Interrupt Mask
0 = Generates interrupt upon assertion of Control flag
1 = Disables interrupt generation upon assertion of Control flag (Default)
R/W 1
Alert Detection Interrupt Mask
0 = Generates interrupt upon assertion of Alert flag
1 = Disables interrupt generation upon assertion of Alert flag (Default)
R/W 1
End of Message Interrupt Mask
0 = Generates interrupt upon assertion of End of Message flag
1 = Disables interrupt generation upon assertion of End of Message flag (Default)
R/W 1
Slave Address Ready Interrupt Mask
0 = Generates interrupt upon assertion of Slave Address Ready flag
1 = Disables interrupt generation upon assertion of Slave Address Ready flag
(Default)
R/W 1
Data Request Interrupt Mask
0 = Generates interrupt upon assertion of Data Request flag
1 = Disables interrupt generation upon assertion of Data Request flag (Default)
R/W 1
Data Ready Interrupt Mask
0 = Generates interrupt upon assertion of Data Ready flag
1 = Disables interrupt generation upon assertion of Data Ready flag (Default)
R/W 1
Clock Low Timeout Interrupt Mask
0 = Generates interrupt upon assertion of Clock Low Timeout flag
1 = Disables interrupt generation upon assertion of Clock Low Timeout flag (Default)
R/W 1
Bus Free Interrupt Mask
0 = Generates interrupt upon assertion of Bus Free flag
1 = Disables interrupt generation upon assertion of Bus Free flag (Default)
Copyright © 2016, Texas Instruments Incorporated
PMBus Interface Registers Reference
4 3
SLAVE_ DATA_ DATA_
ADDR_ REQUEST READY
READY
R/W-1 R/W-1 R/W-1
Description
PMBus Interface/I2C Interface
2 1 0
BUS_LOW_ BUS_FREE
TIMEOUT
R/W-1 R/W-1
389