Texas Instruments UCD3138 Technical Reference Manual page 68

Digital power supply controller
Hide thumbs Also See for UCD3138:
Table of Contents

Advertisement

DPWM 0-3 Registers Reference
Table 2-6. DPWM Control Register 0 (DPWMCTRL0) Register Field Descriptions (continued)
Bit
Field
20
CBC_PWM_AB
_EN
19
CBC_ADV_CNT
_EN
18-17
MIN_DUTY
_MODE
16
MASTER_SYNC
_CNTL_SEL
15
MSYNC_SLAVE
_EN
14
D_ENABLE
13
CBC_SYNC_CUR
_LIMIT_EN
12
RESON_MODE
_FIXED_DUTY
_EN
11
PWM_B_FLT_POL R/W
10
PWM_A_FLT_POL R/W
9
BLANK_B_EN
8
BLANK_A_EN
7-4
PWM_MODE
68
Digital Pulse Width Modulator (DPWM)
Type
Reset
R/W
0
Sets if Fault CBC changes output waveform for PWM-A and PWM-B
0 = PWM-A and PWM-B unaffected by Fault CBC (Default)
1 = PWM-A and PWM-B affected by Fault CBC
R/W
0
Selects cycle-by-cycle of operation
Normal Mode
0 = CBC disabled (Default)
1 = CBC enabled
Multi and Resonant Modes
0 = PWM-A and PWM-B operate independently (Default)
1 = PWM-A and PWM-B pulse matching enabled
R/W
00
Minimum Duty Cycle Mode
00 = Suppression of minimum duty cycles is disabled (Default)
01 = CLA value is clamped to zero when below input value is less than
MIN_DUTY_LOW
10 = CLA value is clamped to MIN_DUTY_LOW register value when input value is
less than MIN_DUTY_LOW
R/W
0
Configures master sync location
0 = Master Sync controlled by Phase Trigger Register (Default)
1 = Master Sync controlled by CLA value
R/W
0
Multi-Sync Slave Mode Control
0 = PWM not synchronized to another PWM channel (Default)
1 = Enable Multi-Sync Slave Mode, current channel will be slaved from
corresponding channel
R/W
0
Converts CLA duty value to DPWM as period-CLA duty value
0 = Value used for event calculations if CLA Duty (Default)
1 = Value used for event calculations is period minus CLA duty value
R/W
0
Sets how current limit affects slave sync
0 = Slave sync is unaffected during current limit (Default)
1 = Slave sync is advanced during current limit.
R/W
0
Configures how duty cycle is controlled in Resonance Mode
0 = Resonant mode duty cycle set by Filter duty (Default)
1 = Resonant mode duty cycle set by Auto Switch High Register
0
Sets the fault output polarity during a disable condition (i.e. fault or module disabled)
0 = PWM B fault output polarity is set to low (Default)
1 = PWM B fault output polarity is set to high
0
Sets the fault output polarity during a disable condition (i.e. fault or module disabled)
0 = PWM A fault output polarity is set to low (Default)
1 = PWM A fault output polarity is set to high
R/W
0
Comparator Blanking Window B Enable
0 = Comparator Blanking Window for PWM-B Disabled (Default)
1 = Comparator Blanking Window for PWM-B Enabled
R/W
0
Comparator Blanking Window A Enable
0 = Comparator Blanking Window for PWM-A Disabled (Default)
1 = Comparator Blanking Window for PWM-B Enabled
R/W
0010
DPWM Mode
0 = Normal Mode
1 = Resonant Mode
2 = Multi-Output Mode (Default)
3 = Triangular Mode
4 = Leading Mode
Copyright © 2016, Texas Instruments Incorporated
Description
SNIU028A – February 2016 – Revised April 2016
Submit Documentation Feedback
www.ti.com

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents