Sar Control Register (Sarctrl); Sar Control Register (Sarctrl) Register Field Descriptions - Texas Instruments UCD3138 Technical Reference Manual

Digital power supply controller
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Front End Control Registers

3.7.13 SAR Control Register (SARCTRL)

Address 0x0008_0030 – Front End Control 2 SAR Control Register
Address 0x000B_0030 – Front End Control 1 SAR Control Register
Address 0x000E_0030 – Front End Control 0 SAR Control Register
31
23
15
7
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 3-15. SAR Control Register (SARCTRL) Register Field Descriptions
Bit
Field
31-24
EADC_WINDOW
_2
23-16
EADC_WINDOW
_1
15-8
SAR_RANGE
7-2
Reserved
1-0
SAR_
RESOLUTION
138
Front End
Figure 3-21. SAR Control Register (SARCTRL)
EADC_WINDOW_2
R/W-0010 1000
EADC_WINDOW_1
R/W-0110 0000
SAR_RANGE
R/W-0000 0000
Reserved
R-0000 00
Type
Reset
R/W
0010
Configures acceptable range of error values to transition to AFE Gain of 2 during
1000
SAR process
R/W
0110
Configures acceptable range of error values to transition to AFE Gain of 1 during
0000
SAR process
R/W
0000
Configures acceptable range of error values before declaring SAR completion
0000
R
0000 00
R/W
00
Configures the final resolution for SAR Conversions
0 = 8mV Resolution, 1x AFE Gain
1 = 4mV Resolution, 2x AFE Gain
2 = 2mV Resolution, 4x AFE Gain
3 = 1mV Resolution, 8x AFE Gain
Copyright © 2016, Texas Instruments Incorporated
2
1
SAR_RESOLUTION
R/W-00
Description
SNIU028A – February 2016 – Revised April 2016
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24
16
8
0

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