Flash Interlock Register - Texas Instruments UCD3138 Technical Reference Manual

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16.1.8 Flash Interlock Register

All operations which modify flash must be started by writing a value to the FLASHILOCK register.
DecRegs.FLASHILOCK.all = 0x42dc157e;
This is done to prevent flash corruption from unexpected events.
Note that with multiple flash blocks, there are different keys for each additional flash block: 0x42DC157E
for data and program flash 0, 0x6C97D0C5 for program flash 1, 0x184219B3 for program flash 2, and
0x5973EF21 for program flash 3.
16.1.9 Clearing RDONLY Bit
Each Memory Fine Base Address Low Register (MFBALR) register has a RDONLY bit. If this bit is set and
a write is attempted to that memory, an illegal access exception will be created. To avoid this, it may be
necessary to clear the RDONLY bit before writing to data or program flash.
16.1.10 Switching from User Mode to Supervisor Mode
The firmware program in UCD3138 EVM tools run in User mode. This is an additional protection against
unforeseen events in the program. Among other things, writing to any DEC register in user mode will
cause a processor reset. So before doing any flash write, it is necessary to switch to supervisor mode.
This is normally done by issuing a software interrupt. Examples can be found in the reference source code
for UCD3138 EVMs.
16.1.11 Erasing Data Flash
Data flash and Program Flash have separate flash programming circuitry, so it is possible to operate on
data flash while executing from program flash. It is not possible to read from data flash while writing or
erasing data flash, however. So all values that will be needed during erase/write process should be stored
in RAM or program Flash.
The UCD3138 has 2048 bytes of Data flash organized in 64 blocks of 32 bytes each. Erasing can be done
a block at a time. To erase a block, first write the key to the FLASHILOCK register. Then simply write to
the Data Flash Control Register (DFLASHCTRL) with the block number in the low 6 bits (PAGE_SEL) and
a 1 in bit 9 (PAGE_ERASE).
Then wait for the BUSY bit in the same register to go low before doing any other Data Flash Operation.
To erase the entire Data Flash, write the key, and then write to DFLASHCTRL with bit 8 (MASS_ERASE)
set. The Busy wait is required for a mass erase as well.
Erasing Data Flash (or Program Flash) sets all the bits in the Flash locations.
16.1.12 Writing to Data Flash
Data flash should be written to in 4 byte words. Writing to Data Flash is very simple. Write the key to
FLASHILOCK and then just write to the location. It is then necessary to monitor the BUSY bit in order to
determine when the write is done. If the RDONLY bit in MFBALR2 is set, it will be necessary to clear it
before the write.
On many flashes, it is possible to write multiple times to the same location without an erase, so long as
more bits are being cleared. On the Data Flash on the UCD3138 family this is not the case. There is
additional correction logic and additional flash bits to permit correction of a single bit error in Data Flash.
Trying multiple writes to the same location without an erase in between will have unpredictable results
because of this.
SNIU028A – February 2016 – Revised April 2016
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