Cim Input Channel Management - Texas Instruments UCD3138 Technical Reference Manual

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The CIM can support 32 interrupt request lines (channel [0] to channel [31]) from the peripherals. These
peripheral interrupt requests are hardwired to each of the CIM 32 channels. The CIM combines the 32
channels into two outputs – an FIQ request to the CPU and an IRQ request to the CPU. The CIM
performs the following functions:
• Manages the input channels
• Prioritizes the interrupt requests to the CPU

16.4.4 CIM Input Channel Management

On the input side, the CIM enables channels on a channel-by-channel basis (in the REQMASK register);
unused channels may be masked to prevent spurious interrupts. Each interrupt channel can be
designated to send either an FIQ or IRQ request to the CPU (in the FIQPR register).
Interrupt Mask Register REQMASK and FIQ/IRQ Program Control Register FIRQPR are writeable in
privilege mode only. A write in user mode to these Registers causes a peripheral illegal access exception.
One way of setting the CPU in privilege mode is through software interrupt. A software interrupt is a
synchronous exception generated by the execution of a particular instruction. A C application can invoke a
software interrupt by associating a software interrupt number with a function name through use of the
SWI_ALIAS pragma and then calling the software interrupt as if it were a function. A C code example of
using software interrupt is shown below:
SNIU028A – February 2016 – Revised April 2016
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Figure 16-3.
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Central Interrupt Module (CIM)
505
Control System Module