Analog Devices ADSP-SC58 Series Hardware Reference Manual page 2611

ADSP-SC58x DAI Register Descriptions
Serial Data Routing Control Register 0
The register routes serial data to the serial ports.
DAI_DAT0
IN2[3:0] (R/W)
Input Data 2
IN1 (R/W)
Input Data 1
Figure 33-23: DAI_DAT0 Register Diagram
Table 33-34: DAI_DAT0 Register Fields
Bit No.
(Access)
29:24 IN4
(R/W)
23:18 IN3
(R/W)
17:12 IN2
(R/W)
11:6 IN1
(R/W)
5:0 IN0
(R/W)
33–60
15 14 13 12 11
0 1 0 0
31 30 29 28 27
0 0 0 0
IN4 (R/W)
Input Data 4
IN3 (R/W)
Input Data 3
Bit Name
Input Data 4.
DAI_DAT0.IN4 holds the Source signal assignment that will be routed to the
DAI_DAT0.IN4 Destination. Refer to the Group B Signals table for Source and
Destination mappings.
Input Data 3.
DAI_DAT0.IN3 holds the Source signal assignment that will be routed to the
DAI_DAT0.IN3 Destination. Refer to the Group B Signals table for Source and
Destination mappings.
Input Data 2.
DAI_DAT0.IN2 holds the Source signal assignment that will be routed to the
DAI_DAT0.IN2 Destination. Refer to the Group B Signals table for Source and
Destination mappings.
Input Data 1.
DAI_DAT0.IN1 holds the Source signal assignment that will be routed to the
DAI_DAT0.IN1 Destination. Refer to the Group B Signals table for Source and
Destination mappings.
Input Data 0.
DAI_DAT0.IN0 holds the Source signal assignment that will be routed to the
DAI_DAT0.IN0 Destination. Refer to the Group B Signals table for Source and
Destination mappings.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
10 9 8 7 6 5 4
0 0 0 0 0 1 0 0
26 25 24 23 22 21 20 19
1 0 0 0 0 0 0 1
Description/Enumeration
3 2 1 0
0 0 0 0
IN0 (R/W)
Input Data 0
18 17 16
0 1 0 0
IN2[5:4] (R/W)
Input Data 2