Analog Devices ADSP-SC58 Series Hardware Reference Manual page 2523

ADSP-SC58x SINC Register Descriptions
Table 32-13: SINC_LEVEL1 Register Fields (Continued)
Bit No.
(Access)
29:24 PSCALE
(R/W)
23:16 PCNT
(R/W)
14 SORD
(R/W)
32–32
Bit Name
Primary (Filter) Scaling.
The SINC_LEVEL1.PSCALE bits specify the scaling applied to the output of group
1 primary filters, prior to DMA transfer to memory. The valid value is between 4 to
32.
The SINC integrator, decimator, and bias adjustment produce an integer value up to
32 bits wide. The range of a full-scale signal of a bit stream filtered by a primary SINC
filter is approximately (BIAS +- ((0.625 * SINC_RATE1.PDEC) ^ order)). The value
requires about ( ln2(SINC_RATE1.PDEC) * order ) bits of precision (where 'order' is
3 or 4, as specified by the SINC_LEVEL1.PORD bit.
This bit field specifies the bit position of the intermediate value, which is transferred
on the MSB of 16-bit DMA sample. Thus, the intermediate value is right-shifted by
(SINC_LEVEL1.PSCALE - 16) bits if SINC_LEVEL1.PSCALE >= 16, or left-
shifted by (16 - SINC_LEVEL1.PSCALE ) bits if SINC_LEVEL1.PSCALE < 16.
If SINC_LEVEL1.PSCALE >= 16, thus selecting a right shift, the shifted value is
rounded up (as if 0.5 * LSB is added) before truncation. Rounding is not necessary for
a left shift. If the scaled and rounded value exceeds the range of a signed 16-bit num-
ber, the sample is saturated (to 0x8000 or 0x7FFF), and the corresponding saturation
status bit (SINC_STAT.PSAT3, SINC_STAT.PSAT2, SINC_STAT.PSAT1, or
SINC_STAT.PSAT0 is set.
Primary (Filter) Count.
The SINC_LEVEL1.PCNT bits specify the modulo number of outputs for group 1
primary filters. The number must be one less than a desired modulo. Each time the
number of outputs specified by this bit filed is transferred, the SINC_STAT.PCNT1
status bit is set (=1). When the SINC_STAT.PCNT1 bit is set (unless masked), it
causes a TRU trigger. For example:
8'h00 written to the SINC_LEVEL1.PCNT bit field sets bit SINC_STAT.PCNT1
to 1 after every primary SINC filter output is transferred.
8'hFF written to the SINC_LEVEL1.PCNT bit field sets bit SINC_STAT.PCNT1
to 1 after every 256 primary SINC filter outputs transferred.
Secondary (Filter) Order.
The SINC_LEVEL1.SORD bit determines the order for group 1 secondary filters.
The SINC_LEVEL1.SORD bit determines the order for group 1 secondary filters.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description/Enumeration
0 Third Order
1 Fourth Order