Analog Devices ADSP-SC58 Series Hardware Reference Manual page 2619

Sharc+ processor
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ADSP-SC58x DAI Register Descriptions
Table 33-41: DAI_FS0 Register Fields (Continued)
Bit No.
(Access)
4:0
IN0
(R/W)
33–68
Bit Name
Input Frame Sync 0.
DAI_FS0.IN0 holds the Source signal assignment that will be routed to the
DAI_FS0.IN0 Destination. Refer to the Group C Signals table for Source and Des-
tination mappings.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description/Enumeration

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