Analog Devices ADSP-SC58 Series Hardware Reference Manual page 2509

ADSP-SC58x SINC Register Descriptions
Bias for Group 0 Register
The register controls an output bias added to primary SINC filters of group 0.
SINC_BIAS0
Figure 32-6: SINC_BIAS0 Register Diagram
Table 32-7: SINC_BIAS0 Register Fields
Bit No.
(Access)
31:0 BIAS
(R/W)
32–18
15 14
0
BIAS[15:0] (R/W)
Bias for Group 0 Primary Filters
31 30
0
BIAS[31:16] (R/W)
Bias for Group 0 Primary Filters
Bit Name
Bias for Group 0 Primary Filters.
The SINC_BIAS0.BIAS bits specify a bias for the primary SINC filters output.
The bias is added to the output prior to saturation and DMA memory transfer. The
valid value is represented in two's complement format; thus, must be programmed to
be equal to -(d ^ o) / 2, where d = SINC_RATE0.PDEC and o =
SINC_LEVEL0.PORD.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
13 12 11 10 9 8 7
0 0 0 0 0 0 0 0
29 28 27 26 25 24 23 22
0 0 0 0 0 0 0 0
Description/Enumeration
6 5 4 3 2 1 0
0 0 0 0 0 0 0
21 20 19 18 17 16
0 0 0 0 0 0 0