Analog Devices ADSP-SC58 Series Hardware Reference Manual page 2579

DAI Sources Overview
Table 33-11: DAI0 Group D – Pin Signal Assignments (Continued)
Selection Code
0011111 (0x1F)
0100000 (0x20)
0100001 (0x21)
0100010 (0x22)
0100011 (0x23)
0100100 (0x24)
0100101 (0x25)
0100110 (0x26)
0100111 (0x27)
0101000 (0x28)
0101001 (0x29)
0101010 (0x2A)
0101011 (0x2B)
0101100 (0x2C)
0101101 (0x2D)
0101110 (0x2E)
0101111 (0x2F)
0110000 (0x30)
0110001 (0x31)
0110100 (0x34)
0110101 (0x35)
0110110 (0x36)
0110111 (0x37)
0111000 (0x38)
0111001 (0x39)
0111010 (0x3A)
0111011 (0x3B)
0111100 (0x3C)
0111101 (0x3D)
0111110 (0x3E)
0111111 (0x3F)
33–28
Source Signal
SPT2_BD1_O
SPT0_ACLK_O
SPT0_BCLK_O
SPT1_ACLK_O
SPT1_BCLK_O
SPT2_ACLK_O
SPT2_BCLK_O
SPT0_AFS_O
SPT0_BFS_O
SPT1_AFS_O
SPT1_BFS_O
SPT2_AFS_O
SPT2_BFS_O
SPT3_AD0_O
SPT3_AD1_O
SPT3_BD0_O
SPT3_BD1_O
MLB0_CLKOUT
SPDIF0_TX_BLKSTART_O
SPT3_ACLK_O
SPT3_BCLK_O
SPT3_AFS_O
SPT3_BFS_O
PCG0_CLKA_O
PCG0_CLKB_O
PCG0_FSA_O
PCG0_FSB_O
Reserved
SRC0_DAT_OP_O
SRC1_DAT_OP_O
SRC2_DAT_OP_O
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description (Source Selection)
SPORT 2 Data BD1
SPORT 0 Clock A
SPORT 0 Clock B
SPORT 1 Clock A
SPORT 1 Clock B
SPORT 2 Clock A
SPORT 2 Clock B
SPORT 0 Frame Sync A
SPORT 0 Frame Sync B
SPORT 1 Frame Sync A
SPORT 1 Frame Sync B
SPORT 2 Frame Sync A
SPORT 2 Frame Sync B
SPORT 3 Data AD0
SPORT 3 Data AD1
SPORT 3 Data BD0
SPORT 3 Data BD1
MLB PLL clock output
SPDIF 0 TX Block Start Output
SPORT 3 Clock A
SPORT 3 Clock B
SPORT 3 Frame Sync A
SPORT 3 Frame Sync B
Precision Clock A
Precision Clock B
Precision Frame Sync A
Precision Frame Sync B
SRC0 Data Output
SRC1 Data Output
SRC2 Data Output