Analog Devices ADSP-SC58 Series Hardware Reference Manual page 2562

scheme becomes highly efficient since it does not make sense (for example) to route a frame sync signal to a data
signal.
The SRU for the DAI contains six groups named A through F. Each group routes a unique set of signals with a
specific purpose:
• Group A routes clock signals
• Group B routes serial data signals
• Group C routes frame sync signals
• Group D routes pin signals
• Group E routes miscellaneous signals
• Group F routes pin output enable signals
Together, the six groups of the SRU include all of the inputs and outputs of the DAI peripherals, a number of addi-
tional signals from the core, and all of the connections to the DAI pins.
It is not possible to connect a signal in one group directly to a signal in a different group (analogous to
NOTE:
wiring from one patch bay to another). However, group D (DAI) is largely devoted to routing in this vein.
DAI Group Routing
Each group has a unique encoding for its associated output signals and a set of configuration registers. For example,
DAI group A is used to route clock signals. The memory-mapped group A registers,
DAI_CLK5, contain bit fields corresponding to the clock inputs of various peripherals. The values written to these
bit fields specify a signal source that is an output from another peripheral. All of the possible encodings represent
sources that are clock signals (or at least could be clock signals in some systems). The Example DAI Group A Multi-
plexing (DAI_CLKx) diagrams the input signals that are controlled by the group A registers. All bit fields in the
SRU configuration registers correspond to inputs. The value written to the bit field specifies the signal source. This
value is also an output from some other component within the SRU.
The SRU is similar to a set of patch bays. Each bay routes a distinct set of outputs to compatible inputs. These
connections are implemented as a set of memory-mapped registers with a bit field for each input. The outputs are
implemented as a set of bit encodings. Conceptually, a patch cord is used to connect an output to an input. In the
SRU, a bit pattern that is associated with a signal output (shown in the Example DAI Group A Multiplexing
(DAI_CLKx) figure) is written to a bit field corresponding to a signal input.
The same encoding can be written to any number of bit fields in the same group. It is not possible to run out of
patch points for an output signal.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Signal Routing Units (SRUs)
DAI_CLK0 through
33–11