Analog Devices ADSP-SC58 Series Hardware Reference Manual page 2525

ADSP-SC58x SINC Register Descriptions
(Amplitude) Limits for Secondary Filter 0 Register
The register controls amplitude limits for a secondary filter of SINC pair 0.
SINC_LIMIT0
Figure 32-13: SINC_LIMIT0 Register Diagram
Table 32-14: SINC_LIMIT0 Register Fields
Bit No.
(Access)
31:16 LMAX
(R/W)
15:0 LMIN
(R/W)
32–34
15 14 13
0 0 0
LMIN (R/W)
Limit Minimum for Secondary Filter 0
31 30 29
0 0 0
LMAX (R/W)
Limit Maximum for Secondary Filter 0
Bit Name
Limit Maximum for Secondary Filter 0.
The SINC_LIMIT0.LMAX bits specify the output signal conditions for the secon-
dary SINC filter 0. In conjunction with bits LCNT and LWIN in register
SINC_LEVEL1
ed maximum limit warning bit in register SINC_STAT.
Limit Minimum for Secondary Filter 0.
The SINC_LIMIT0.LMIN bits specify the output signal conditions for the secon-
dary SINC filter 0. In conjunction with bits LCNT and LWIN in register
SINC_LEVEL1
ed minimum limit warning bit in register SINC_STAT.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
12 11 10 9 8 7 6 5
0 0 0 0 0 0 0 0
28 27 26 25 24 23 22 21
0 0 0 0 0 0 0 0
Description/Enumeration
or SINC_LEVEL0, this bit field specifies conditions for an associat-
or SINC_LEVEL0, this bit field specifies conditions for an associat-
4 3 2 1 0
0 0 0 0 0
20 19 18 17 16
0 0 0 0 0