Sub-Ghz Radio Generic Synchronization Word Control Register 0; (Subghz_Gsyncr0); Sub-Ghz Radio Lora Synchronization Word Msb Register; (Subghz_Lsyncrh) - ST STM32WL5 Series Reference Manual

Sub-GHz radio (SUBGHZ)
Bits 7:0 SYNCWORD[15:8]: Second byte of generic packet synchronization word
5.10.15

Sub-GHz radio generic synchronization word control register 0

(SUBGHZ_GSYNCR0)

Address offset: 0x06C7
Reset value: 0x64
7 6
rw rw
Bits 7:0 SYNCWORD[7:0]: First byte of generic packet synchronization word
5.10.16

Sub-GHz radio LoRa synchronization word MSB register

(SUBGHZ_LSYNCRH)

Address offset: 0x0740
Reset value: 0x14
7 6
rw rw
Bits 7:0 SYNCWORD[15:8]: LoRa synchronization word MSB bits [15:8]
5.10.17

Sub-GHz radio LoRa synchronization word LSB register

(SUBGHZ_LSYNCRL)

Address offset: 0x0741
Reset value: 0x24
7 6
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Bits 7:0 SYNCWORD[7:0]: LoRa synchronization word LSB bits [7:0]
212/1461
5
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5
rw
0x14: LoRa private network
0x34: LoRa public network
Others: reserved
5
rw
0x24: LoRa private network
0x44: LoRa public network
Others: reserved
4 3
SYNCWORD[7:0]
rw rw
4 3
SYNCWORD[15:8]
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4 3
SYNCWORD[7:0]
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RM0453 Rev 1
2 1
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2 1
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2 1
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RM0453
0
rw
0
rw
0
rw