Sub-Ghz Radio Register Map; Table 42. Subghz Radio Register Map And Reset Values - ST STM32WL5 Series Reference Manual

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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RM0453
5.10.29

Sub-GHz radio register map

Offset
0x06AC
0x06AC
to
0x06B4
0x06B8
0x06B9
0x06BC
0x06BD
0x06BE
0x06BF
0x06C0
0x06C1
0x06C2
0x06C3
0x06C4
0x06C5
0x06C6
0x06C7
0x06C8
to
0x073C
0x0740
0x0741

Table 42. SUBGHZ radio register map and reset values

Register
SUBGHZ_GBSYNCR
Reset value
Reserved
SUBGHZ_GPKTCTL1AR
Reset value
SUBGHZ_GWHITEINIRL
Reset value
SUBGHZ_GCRCINIRH
Reset value
SUBGHZ_GCRCINIRL
Reset value
SUBGHZ_GCRCPOLRH
Reset value
SUBGHZ_GCRCPOLRL
Reset value
SUBGHZ_GSYNCR7
Reset value
SUBGHZ_GSYNCR6
Reset value
SUBGHZ_GSYNCR5
Reset value
SUBGHZ_GSYNCR4
Reset value
SUBGHZ_GSYNCR3
Reset value
SUBGHZ_GSYNCR2
Reset value
SUBGHZ_GSYNCR1
Reset value
SUBGHZ_GSYNCR0
Reset value
Reserved
SUBGHZ_LSYNCRH
Reset value
SUBGHZ_LSYNCRL
Reset value
7
6
5
Res.
RXDINV
0
0
Res.
Res.
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
1
0
1
0
0
0
1
0
1
0
0
1
0
0
1
1
0
1
1
0
0
0
0
0
1
RM0453 Rev 1
Sub-GHz radio (SUBGHZ)
4
3
2
Res.
Res.
0
Reserved
CONTTX
INFSQEQSEL[1:0]
0
0
0
WHITEINI[7:0]
0
0
0
CRCINI[15:8]
1
1
1
CRCINI[7:0]
0
1
1
CRCPOL[15:8]
1
0
0
CRCPOL[7:0]
0
0
0
SYNCWORD[63:56]
1
0
1
SYNCWORD[55:48]
0
0
0
SYNCWORD[47:40]
1
0
0
SYNCWORD[39:32]
0
0
1
SYNCWORD[31:24]
1
0
1
SYNCWORD[23:16]
1
0
0
SYNCWORD[15:8]
0
0
1
SYNCWORD[7:0]
0
0
1
Reserved
SYNCWORD[15:8]
1
0
1
SYNCWORD[7:0]
0
0
1
1
0
Res.
Res.
0
1
0
0
0
1
1
1
0
0
0
1
1
1
1
1
1
0
0
1
1
0
1
1
0
1
0
0
0
0
0
0
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