Sub-Ghz Radio Data Buffer; Figure 14. Sub-Ghz Ram Data Buffer Operation - ST STM32WL5 Series Reference Manual

Sub-GHz radio (SUBGHZ)
length definition. The full packet (preamble, synch word, device id to CRC) must be provided
in the transmit data buffer.
5.6

Sub-GHz radio data buffer

The sub-GHz radio uses a 256-byte RAM data buffer that is accessible by the CPU through
the SUBGHZSPI interface in all sub-GHz radio operating modes except Sleep and
Deep-Sleep. The RAM data buffer is cleared in Deep-Sleep mode, optionally retained in
Sleep mode and always retained in all other modes. In Sleep and Deep-Sleep modes, the
TxBaseAddr and RxBaseAddr values are lost. In order to retrieve data after Sleep mode
retention, the default values must be used (TxBaseAddr = 0x80 and RxBaseAddr = 0x00),
or RxPayloadLength and RxStartBufferPointer must be stored in the CPU memory.
The RAM data buffers are fully configurable. They allow access to the transmit data buffer
and the last receive data buffer. The RAM data buffer organization is depicted in the figure
below.
The RAM data buffer is accessed by Write_Buffer() and Read_Buffer()commands.
The offset parameter defines the address in the SRAM data buffer. To read the first byte
from the receive data buffer, the offset must be set to the RxStartBufferPointer value. To
write to the first byte in the transmit data buffer, the offset must be set to the TxBaseAddr
value.
The RAM data buffer has a circular nature: any address increment exceeding 0xFF wraps
around to address 0x00.
168/1461

Figure 14. sub-GHz RAM data buffer operation

CPU side
address 0xFF
TxBaseAddr + PayloadLength
Write_Buffer()
TxBaseAddr
Read_Buffer()
RxBaseAddr
address 0x00
RAM data
buffer
TxBufferPointer
Transmit
data buffer
Receive
data buffer
RxStartBufferPointer + RxPayloadLength
Last received
poayload
RxStartBufferPointer
RM0453 Rev 1
Sub-GHz radio side
RM0453
MSv62621V1