Read And Write Signals; Ale Signal - Renesas M16C/62P Series Hardware Manual

M16C/62P Group (M16C/62P, M16C/62PT)
8.2.4

Read and Write Signals

When the data bus is 16 bits wide, the read and write signals can be chosen to be a combination of RD, BHE
and WR or a combination of RD, WRL and WRH by using the PM02 bit in the PM0 register. When the data
bus is 8 bits wide, use a combination of RD, WR and BHE.
Table 8.3 shows the Operation of RD, WRL, and WRH Signals. Table 8.4 shows the Operation of RD, WRL,
and BHE Signals.
Table 8.3 Operation of RD, WRL and WRH Signals
Data Bus Width
16-bit
(BYTE pin input = L)
Table 8.4 Operation of RD, WRL and BHE Signals
Data Bus Width
16-bit
(BYTE pin input = L)
8-bit
(BYTE pin input = H)
8.2.5

ALE Signal

The ALE signal latches the address when accessing the multiplex bus space. Latch the address when the ALE
signal falls.
When BYTE Pin Input = H
ALE
A0/D0 to A7/D7
A8 to A19
NOTES :
1. If the entire CS space is assigned a multiplexed bus, these pins function as I/O ports.
Figure 8.3 ALE Signal, Address Bus, Data Bus
Rev.2.41 Jan 10, 2006
REJ09B0185-0241
http://www.xinpian.net
RD WRL WRH
L H
H L
H H
H L
RD WRL BHE
H L L
L H L
H L H
L H H
H L L
L H L
H L Not used H or L Write 1 byte of data
L H Not used H or L Read 1 byte of data
Address Data
(1)
Address
Page 63 of 390
提供单片机解密、IC解密、芯片解密业务
Status of External Data Bus
H Read data
H Write 1 byte of data to an even address
L Write 1 byte of data to an odd address
L Write data to both even and odd addresses
A0 Status of External Data Bus
H Write 1 byte of data to an odd address
H Read 1 byte of data from an odd address
L Write 1 byte of data to an even address
L Read 1 byte of data from an even address
L Write data to both even and odd addresses
L Read data from both even and odd addresses
When BYTE Pin Input = L
ALE
A0
A1/D0 to A8/D7
A9 to A19
Address
Address Data
Address
010-62245566 13810019655
8. Bus