Module Standby Function; Module Standby Timing; Read/Write In Module Standby - Renesas F-ZTAT H8 Series Hardware Manual

Section 21 Power-Down State
Clock
oscillator
RES
STBY
21.6

Module Standby Function

21.6.1

Module Standby Timing

The module standby function can halt several of the on-chip supporting modules (the ITU, SCI0,
SCI1, DMAC, refresh controller, and A/D converter) independently of the power-down state. This
standby function is controlled by bits MSTOP5 to MSTOP0 in MSTCR. When one of these bits is
set to 1, the corresponding on-chip supporting module is placed in standby and halts at the
beginning of the next bus cycle after the MSTCR write cycle.
21.6.2

Read/Write in Module Standby

When an on-chip supporting module is in module standby, read/write access to its registers is
disabled. Read access always results in H'FF data. Write access is ignored.
Rev. 7.00 Sep 21, 2005 page 674 of 878
REJ09B0259-0700
Figure 21.2 Hardware Standby Mode Timing
Oscillator
settling time
Reset
exception
handling