Embedded Flash Memory In Stm32F405Xx/07Xx And Stm32F415Xx/17Xx; Figure 4. Flash Memory Interface Connection Inside System Architecture (Stm32F42Xxx And Stm32F43Xxx) - STMicroelectronics STM32F405 Reference Manual

Advanced arm-based 32-bit mcus
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Embedded Flash memory interface
Figure 4. Flash memory interface connection inside system architecture
3.3
Embedded Flash memory in
STM32F405xx/07xx and STM32F415xx/17xx
The Flash memory has the following main features:
Capacity up to 1 Mbyte
128 bits wide data read
Byte, half-word, word and double word write
Sector and mass erase
Memory organization
The Flash memory is organized as follows:
Low-power modes (for details refer to the Power control (PWR) section of the reference
manual)
74/1731
(STM32F42xxx and STM32F43xxx)
A main memory block divided into 4 sectors of 16 Kbytes, 1 sector of 64 Kbytes,
and 7 sectors of 128 Kbytes
System memory from which the device boots in System memory boot mode
512 OTP (one-time programmable) bytes for user data
The OTP area contains 16 additional bytes used to lock the corresponding OTP
data block.
Option bytes to configure read and write protection, BOR level, watchdog
software/hardware and reset when the device is in Standby or Stop mode.
DocID018909 Rev 11
RM0090

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