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CHAPTER 17 EXTENDED I/O SERIAL INTERFACE
17.2 Register in Extended I/O Serial Interface
17.2.1
Serial Mode Control Status Register (SMCS)
The configuration and functions of Serial mode control status register (SMCS) is
described.
■ Serial Mode Control Status Register (SMCS)
Serial mode control status register (SMCS) is a register which controls the transfer operating mode of serial
I/O.
Figure 17.2-2 shows the bit configuration of serial mode control status register (SMCS).
SMCS
Address
: 000059
SMCS
: 000058
Address
R/W : Readable/Writable
R
: Read only
: Undefined
X
: Undefined value
Function of each bit of serial mode control status register (SMCS) is described as follows:
[bit15 to bit13] SMD2 to SMD0:Serial Shift Clock Mode (shift clock selection)
The serial shift clock mode is selected.
Table 17.2-1 and Table 17.2-2 show the settings of the serial shift clock mode.
Table 17.2-1 Serial Shift Clock Mode Selection
SMD2
0
0
0
0
1
1
1
1
370
Figure 17.2-2 Bit Configuration of Serial Mode Control Status Register (SMCS)
bit
15
14
13
SMD2 SMD1 SMD0
H
(R/W) (R/W) (R/W) (R/W) (R/W)
5
bit
7
6
H
φ=24 MHz
SMD1
SMD0
div=8
0
0
1.5 MHz
0
1
750 kHz
1
0
188 kHz
1
1
93.4 kHz
0
0
46.9 kHz
0
1
1
0
1
1
FUJITSU MICROELECTRONICS LIMITED
12
11
10
9
SIE
SIR BUSY
STRT
STOP
(R)
(R/W) (R/W)
3
2
4
1
MODE BDS
SOE SCOE
(R/W) (R/W) (R/W) (R/W)
φ=12 MHz
div=4
1.5 MHz
750 kHz
188 kHz
93.4 kHz
46.9 kHz
External shift clock mode
Setting disabled
Setting disabled
MB90335 Series
8
Serial mode control
status register
00000010
Initial value
0
Serial mode control
status register
XXXX0000
Initial value
φ=6 MHz
Value of dividing
div=6
frequency
500 kHz
250 kHz
62.5 kHz
31.2 kHz
15.6 kHz
CM44-10137-6E
B
B
2
4
16
32
64
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