A/D Converter Operation - Intel 8XC196NT User Manual

Table 11-2. A/D Control and Status Registers (Continued)
Mnemonic Address
P0_PIN 1FDAH

11.3 A/D CONVERTER OPERATION

An A/D conversion converts an analog input voltage to a digital value, stores the result in the
AD_RESULT register, and sets the A/D interrupt pending bit. An 8-bit conversion provides
20 mV resolution, while a 10-bit conversion provides 5 mV resolution. An 8-bit conversion takes
less time than a 10-bit conversion because it has two fewer bits to resolve and the comparator re-
quires less settling time for 20 mV resolution than for 5 mV resolution.
You can convert either the voltage on an analog input channel or a test voltage. Converting the
test inputs allows you to calculate the zero-offset error, and the zero-offset adjustment allows you
to compensate for it. This feature can reduce or eliminate off-chip compensation hardware. Typ-
ically, you would convert the test voltages and adjust for the zero-offset error before performing
conversions on an input channel. The AD_TEST register allows you to select a test voltage and
program a zero-offset adjustment.
A threshold-detection compares an input voltage to a programmed reference voltage and sets the
A/D interrupt pending bit when the input voltage crosses over or under the reference voltage.
A conversion can be started by a write to the AD_COMMAND register or it can be initiated by
the EPA, which can provide equally spaced samples or synchronization with external events.
(See"Programming the EPA and Timer/Counters" on page 10-17.) The A/D scan mode of the pe-
ripheral transaction server (PTS) allows you to perform multiple conversions and store their re-
sults. (See "A/D Scan Mode" on page 5-26.)
Once the A/D converter receives the command to start a conversion, a delay time elapses before
sampling begins. (EPA-initiated conversions begin after the capture/compare event. Immediate
conversions, those initiated directly by a write to AD_COMMAND, begin within three state
times after the instruction is completed.) During this sample delay, the hardware clears the suc-
cessive approximation register and selects the designated multiplexer channel. After the sample
delay, the device connects the multiplexer output to the sample capacitor for the specified sample
time. After this sample window closes, it disconnects the multiplexer output from the sample ca-
pacitor so that changes on the input pin will not alter the stored charge while the conversion is in
progress. The device then zeros the comparator and begins the conversion.
Port 0 Pin State
Read P0_PIN to determine the current values of the port 0 pins.
Reading the port induces noise into the A/D converter, decreasing
the accuracy of any conversion in progress. We strongly
recommend that you not read the port while an A/D conversion is in
progress. To reduce noise, the P0_PIN register is clocked only
when the port is read.
ANALOG-TO-DIGITAL CONVERTER
Description
11-3