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8XC196NT USER'S MANUAL
x 0
Opcode
SKIP
0 x
1 x
2 x
3 x
bit 0
4 x
di
5 x
di
6 x
di
7 x
di
8 x
di
9 x
di
A x
di
B x
di
ST
C x
di
JNST
D x
DJNZ
E x
RET
F x
NOTE: The first digit of the opcode is listed vertically, and the second digit is listed horizontally. The
related instruction mnemonic is shown at the intersection of the two digits. Shading indicates
reserved opcodes. If the CPU attempts to execute an unimplemented opcode, an interrupt
occurs. For more information, see "Unimplemented Opcode" on page 5-6.
A-2
Table A-1. Opcode Map (Left Half)
x 1
x 2
CLR
NOT
CLRB
NOTB
NEGB
bit 1
bit 2
AND 3op
im
in
ANDB 3op
im
in
AND 2op
im
in
ANDB 2op
im
in
OR
im
in
ORB
im
in
LD
im
in
LDB
im
in
BMOV
ST
in
JNH
JGT
DJNZW
TIJMP
BR/EBR
ECALL
PUSHF
POPF
x 3
x 4
NEG
XCH
DEC
di
XCHB
DECB
di
SJMP
JBC
bit 3
bit 4
bit 5
ix
di
ix
di
ix
di
ix
di
ix
di
ix
di
ix
di
ix
di
STB
CMPL
ix
di
JNC
JNVT
JNV
EBMOVI
in
PUSHA
POPA
x 5
x 6
x 7
EXT
INC
EXTB
INCB
bit 6
bit 7
ADD 3op
im
in
ix
ADDB 3op
im
in
ix
ADD 2op
im
in
ix
ADDB 2op
im
in
ix
XOR
im
in
ix
XORB
im
in
ix
ADDC
im
in
ix
ADDCB
im
in
ix
STB
in
ix
JGE
JNE
EJMP
LJMP
IDLPD
TRAP
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