Intel 8XC196NT User Manual page 518

EPA_PEND
When hardware detects a pending EPA x interrupt, it sets the corresponding bit in the EPA interrupt
pending (EPA_PEND or EPA_PEND1) registers. The EPAIPV register contains a number that
identifies the highest priority, active, multiplexed interrupt source. When EPAIPV is read, the EPA
interrupt pending bit associated with the EPAIPV priority value is cleared.
15
EPA4 EPA5
7
OVR2 OVR3
Bit
Number
15:10 Any set bit indicates that the corresponding EPA x interrupt source is pending. The bit is
cleared when the EPA interrupt priority vector register (EPAIPV) is read.
EPA6 EPA7
OVR4 OVR5
Function
Address:
Reset State:
EPA8 EPA9
OVR6 OVR7
REGISTERS
EPA_PEND
1FA2H
0000H
8
OVR0 OVR1
0
OVR8 OVR9
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