Intel 8XC196NT User Manual page 592

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register RAM, 4-13
RD#, 14-4, B-10
considerations, 6-12
during bus hold, 14-19
idle, powerdown, reset status, B-14
READY, 14-5, 14-17–14-19, 15-25, B-10
and wait states, 14-17
considerations, 6-13
idle, powerdown, reset status, B-14
timing requirements, 14-18
Ready control, 14-17–14-19
REAL variables, 3-5
Reduced instruction set monitor‚ See RISM
Register bits
naming conventions, 1-4
reserved, 1-4
Register file, 2-3, 4-12
and windows, 4-12, 4-15
lower, 4-12, 4-13, 4-15
upper, 4-12, 4-13
See also windows
Register RAM
and powerdown mode, 13-3, 13-4
Registers
AD_COMMAND, 11-2
AD_RESULT, 11-2
AD_TEST, 11-2, 11-5
AD_TIME, 11-2
allocating, 3-12
EP_DIR, 6-18, 6-21, 6-23, 6-24
EP_MODE, 6-19, 6-21, 6-23, 6-24, 6-26
EP_PIN, 6-19, 6-20, 6-23, 6-24
EP_REG, 4-24, 6-19, 6-23, 6-24, 6-25, 6-26
considerations, 6-25
INT_MASK, 5-3, 5-4, 5-10, 5-15, 11-2,
15-34
INT_MASK1, 5-4, 5-10, 5-15, 7-2, 8-2, 8-13,
9-4, 15-34
INT_PEND, 5-4, 5-16, 11-2
INT_PEND1, 5-4, 5-16, 7-2, 8-3, 8-8, 9-4, 9-5
naming conventions, 1-4
P0_PIN, 6-1, 6-2, 6-3, 11-3
P1_MODE
considerations, 6-11
P2_DIR, 7-2
P2_MODE, 7-2
considerations, 6-11, 6-12
P2_PIN, 7-2, 8-3
P2_REG, 7-3
considerations, 6-12
P34_DRV, 6-15, 6-17
P3_PIN, 9-2, 9-5
P3_REG, 9-2, 9-5
P5_MODE
considerations, 6-12, 6-13
P6_DIR, 7-3
P6_MODE, 7-3
considerations, 6-13
P6_PIN, 7-3
P6_REG, 7-3
considerations, 6-13
PPW, 15-8, 15-9
PSW, 5-4, 5-15
PTSCON, 5-20
PTSCOUNT, 5-19
PTSSEL, 5-4
PTSSRV, 5-4
Px_DIR, 6-4, 6-8, 6-9, 6-10
Px_MODE, 6-4, 6-8, 6-9, 6-10
Px_PIN, 6-4, 6-6, 6-8, 6-15, 6-17
Px_REG, 6-4, 6-8, 6-9, 6-10, 6-15, 6-16, 6-17
RALU, 2-4
SBUF_RX, 7-3
SBUF_TX, 7-3
SLP_CMD, 9-2, 9-5
SLP_CON, 9-5, 9-14
SLP_STAT, 9-2, 9-5, 9-14, 9-15, 9-16, C-51
SP_BAUD, 7-3, 7-10, 7-11
SP_CON, 7-3, 7-9
SP_PPW, 15-8, 15-9
SP_STATUS, 7-3, 7-12
SSIO0_BUF, 8-3, 8-5
SSIO0_CON, 8-3
configuring for handshaking, 8-6
SSIO1_BUF, 8-3
SSIO1_CON, 8-3
configuring for handshaking, 8-6
SSIO_BAUD, 8-3, 8-9
values, 8-10
SSIOx_BUF, 8-8
SSIOx_CON, 8-11
using, 3-12
WSR, 5-15
Reserved bits, defined, 1-4
Reserved memory, See Memory, reserved
Reset, 12-9, 14-5
INDEX
Index-11

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