Slave Programming Circuit And Memory Map - Intel 8XC196NT User Manual

8XC196NT USER'S MANUAL
Table 15-7. Device Signature Word and Programming Voltages
Device
8XC196NT

15.8.2 Slave Programming Circuit and Memory Map

Figure 15-5 shows the circuit diagram and Table 15-8 shows the memory map for slave program-
ming mode. The external clock signal can be supplied by either a clock or a crystal. Refer to the
device datasheet for acceptable clock frequencies.
0.1 µF
EA#
V
PP
V
CC
15-16
Signature Word
Location
0070H
V
XTAL1
CC
V
RESET#
CC
NMI
V
SS
P4.7:0
P3.7:0
EA#
P2.6
V
P2.4
PP
P2.2
P2.1
P2.0
V
REF
P0.7/PMODE.3
P0.6/PMODE.2
P0.5/PMODE.1
P0.4/PMODE.0
ANGND
87C196 Device
Figure 15-5. Slave Programming Circuit
Programming V
Value Location Value
87AFH 0072H 40H
CLOCK
RESET#
PBUS
Pullups Required
CPVER
AINC#
PROG#
PALE#
PVER
Programming V
CC PP
Location Value
0073H 0A0H
V
CC
10
kΩ
P4.7 - P3.0
A0256-03