Intel 8XC196NT User Manual page 529

8XC196NT USER'S MANUAL
INT_PEND1
INT_PEND1
When hardware detects a pending interrupt, it sets the corresponding bit in the interrupt pending
(INT_PEND or INT_PEND1) registers. When the vector is taken, the hardware clears the pending bit.
Software can generate an interrupt by setting the corresponding interrupt pending bit.
7
NMI EXTINT
Bit
Number
7:6 Any set bit indicates that the corresponding interrupt is pending. The interrupt bit is
4:0 cleared when processing transfers to the corresponding interrupt vector.
The standard interrupt vector locations are as follows:
Bit Mnemonic Interrupt
NMI
EXTINT
RI
TI
SSIO1
SSIO0
CBF
5 Reserved. This bit is undefined.
C-34
— RI
Function
Nonmaskable Interrupt
EXTINT pin
SIO Receive
SIO Transmit
SSIO 1 Transfer
SSIO 0 Transfer
Slave Port Command Buffer Full
Address:
Reset State:
TI SSIO1 SSIO0
Standard Vector
FF203EH
FF203CH
FF2038H
FF2036H
FF2034H
FF2032H
FF2030H
0012H
00H
0
CBF