Intel 8XC196NT User Manual page 199

8XC196NT USER'S MANUAL
Master
•
One channel can act as master transceiver to communicate with compatible protocols in
half-duplex mode. This mode requires one data input/output pin and one clock output pin.
•
One channel can act as slave transceiver to communicate with compatible protocols in half-
duplex mode. This mode requires one data input/output pin and one clock input pin.
8-4
SD0
SC0
Single-channel Half-duplex Master/Slave Configuration
SD0
Master
SC0
SD1
Slave
SC1
Double-channel Full-duplex Lockstep
Common Clock Configuration
SD0
Master
SC0
SD1
Slave
SC1
Double-channel Full-duplex Master/Slave
Separate Clock Configuration
Figure 8-2. SSIO Operating Modes
SD0
Slave
SC0
SD0
Slave
SC0
SD1
Slave
SC1
SD0
Slave
SC0
SD1
Master
SC1
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