Intel 8XC196NT User Manual page 117

8XC196NT USER'S MANUAL
PTSSEL
The PTS select (PTSSEL) register selects either a PTS microcode routine or a standard interrupt
service routine for each interrupt request. Setting a bit selects a PTS microcode routine; clearing a bit
selects a standard interrupt service routine. When PTSCOUNT reaches zero, hardware clears the
corresponding PTSSEL bit. The PTSSEL bit must be set manually to re-enable the PTS channel.
15
— EXTINT
7
IBF OBE
Bit
Number
15, 13 Reserved; for compatibility with future devices, write zero to this bit.
14, 12:0 Setting a bit causes the corresponding interrupt to be handled by a PTS microcode
routine.
The PTS interrupt vector locations are as follows:
Bit Mnemonic Interrupt
EXTINT
RI
TI
SSIO1
SSIO0
CBF
IBF
OBE
AD
EPA0
EPA1
EPA2
EPA3
EPA x
†
PTS service is not recommended because the PTS cannot determine the source of
shared interrupts.
5-12
— RI
AD EPA0
EXTINT pin
SIO Receive
SIO Transmit
SSIO 1 Transfer
SSIO 0 Transfer
Slave Port Command Buffer Full
Slave Port Input Buffer Full
Slave Port Output Buffer Empty
A/D Conversion Complete
EPA Capture/Compare Channel 0
EPA Capture/Compare Channel 1
EPA Capture/Compare Channel 2
EPA Capture/Compare Channel 3
†
Multiplexed EPA
Figure 5-4. PTS Select (PTSSEL) Register
Reset State:
TI SSIO1
EPA1 EPA2
Function
PTS Vector
FF205CH
FF2058H
FF2056H
FF2054H
FF2052H
FF2050H
FF204EH
FF204CH
FF204AH
FF2048H
FF2046H
FF2044H
FF2042H
FF2040H
Address: 0004H
0000H
8
SSIO0 CBF
0
EPA3 EPA x